Commit Graph

68 Commits

Author SHA1 Message Date
Andy Yan
938fbb16ab drm/rockchip: vop2: Support 32x8 superblock afbc
This is the only afbc format supported by the upcoming
VOP for rk3576.

Add support for it.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Tested-by: Michael Riesch <michael.riesch@wolfvision.net> # on RK3568
Tested-by: Detlev Casanova <detlev.casanova@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20241231090802.251787-2-andyshrk@163.com
2025-01-05 17:00:06 +01:00
Min-Hua Chen
77b1ccb2a2 drm/rockchip: vop2: include rockchip_drm_drv.h
Move rockchip_drm_drv.h in rockchip_drm_vop2.h to fix the follow
sparse warning:

ARCH=arm64 LLVM=1 make C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__'
mrproper defconfig all  -j12

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c:502:24: sparse:
warning: symbol 'vop2_platform_driver' was not declared. Should it
be static?

It is also beneficial for the upcoming support for rk3576.

Fixes: 604be85547 ("drm/rockchip: Add VOP2 driver")
Signed-off-by: Min-Hua Chen <minhuadotchen@gmail.com>
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Min-Hua Chen <minhuadotchen@gmail.com>
Tested-by: Detlev Casanova <detlev.casanova@collabora.com>
Tested-by: Michael Riesch <michael.riesch@wolfvision.net> # on RK3568
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20241214081719.3330518-8-andyshrk@163.com
2024-12-18 17:39:01 +01:00
Andy Yan
7e8a56c703 drm/rockchip: vop2: Add check for 32 bpp format for rk3588
RK3588 only support DRM_FORMAT_XRGB2101010/XBGR2101010 in afbc mode.

Fixes: 5a028e8f06 ("drm/rockchip: vop2: Add support for rk3588")
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20241214081719.3330518-7-andyshrk@163.com
2024-12-18 17:39:01 +01:00
Andy Yan
df063c0b8f drm/rockchip: vop2: Check linear format for Cluster windows on rk3566/8
The Cluster windows on rk3566/8 only support afbc mode.

Fixes: 604be85547 ("drm/rockchip: Add VOP2 driver")
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20241214081719.3330518-6-andyshrk@163.com
2024-12-18 17:39:00 +01:00
Andy Yan
c766998ba6 drm/rockchip: vop2: Setup delay cycle for Esmart2/3
Each layer needs to set the correct delay cycle to display properly
without unexpected offset on screen.

Fixes: 5a028e8f06 ("drm/rockchip: vop2: Add support for rk3588")
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Tested-by: Derek Foreman <derek.foreman@collabora.com>
Tested-by: Detlev Casanova <detlev.casanova@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20241214081719.3330518-5-andyshrk@163.com
2024-12-18 17:38:59 +01:00
Andy Yan
7b256880fd drm/rockchip: vop2: Set AXI id for rk3588
There are two AXI bus in vop2, windows attached on the same bus must
have a unique channel YUV and RGB channel ID.

The default IDs will conflict with each other on the rk3588, so they
need to be reassigned.

Fixes: 5a028e8f06 ("drm/rockchip: vop2: Add support for rk3588")
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Tested-by: Derek Foreman <derek.foreman@collabora.com>
Tested-by: Detlev Casanova <detlev.casanova@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20241214081719.3330518-4-andyshrk@163.com
2024-12-18 17:38:57 +01:00
Andy Yan
0ca953ac22 drm/rockchip: vop2: Fix the windows switch between different layers
Every layer of vop2 should bind a window, and we also need to make
sure that this window is not used by other layer.

0x5 is a reserved layer sel value on rk3568, but it will select
Cluster3 on rk3588, configure unused layers to 0x5  will lead
alpha blending error on rk3588.

When we bind a window from layerM to layerN, we move the old window
on layerN to layerM.

Fixes: 604be85547 ("drm/rockchip: Add VOP2 driver")
Tested-by: Derek Foreman <derek.foreman@collabora.com>
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20241214081719.3330518-3-andyshrk@163.com
2024-12-15 00:05:45 +01:00
Andy Yan
779964556c drm/rockchip: vop2: Add debugfs support
/sys/kernel/debug/dri/vop2/summary:  dump vop display state
/sys/kernel/debug/dri/vop2/regs: dump whole vop registers
/sys/kernel/debug/dri/vop2/active_regs: only dump the registers of
activated modules

Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Tested-by: Michael Riesch <michael.riesch@wolfvision.net> # on RK3568
Tested-by: Detlev Casanova <detlev.casanova@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20241214081719.3330518-2-andyshrk@163.com
2024-12-15 00:05:43 +01:00
Piotr Zalewski
9c22b6ece2 drm/rockchip: vop2: don't check color_mgmt_changed in atomic_enable
Remove color_mgmt_changed check from vop2_crtc_atomic_try_set_gamma to
allow gamma LUT rewrite during modeset when coming out of suspend. Add
a check for color_mgmt_changed directly in vop2_crtc_atomic_flush.

This patch fixes the patch adding gamma LUT support for vop2 [1].

[1] https://lore.kernel.org/linux-rockchip/20241101185545.559090-3-pZ010001011111@proton.me/

Suggested-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Piotr Zalewski <pZ010001011111@proton.me>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20241206192013.342692-3-pZ010001011111@proton.me
2024-12-11 23:38:03 +01:00
Andy Yan
6b4dfdcde3 drm/rockchip: vop2: Fix the mixer alpha setup for layer 0
The alpha setup should start from the second layer, the current calculation
starts incorrectly from the first layer, a negative offset will be obtained
in the following formula:

offset = (mixer_id + zpos - 1) * 0x10

Fixes: 604be85547 ("drm/rockchip: Add VOP2 driver")
Tested-by: Derek Foreman <derek.foreman@collabora.com>
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20241209122943.2781431-7-andyshrk@163.com
2024-12-11 00:07:33 +01:00
Andy Yan
17b4b10a0d drm/rockchip: vop2: Fix cluster windows alpha ctrl regsiters offset
The phy_id of cluster windws are not increase one for each window.

Fixes: 604be85547 ("drm/rockchip: Add VOP2 driver")
Tested-by: Derek Foreman <derek.foreman@collabora.com>
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20241209122943.2781431-6-andyshrk@163.com
2024-12-11 00:07:31 +01:00
Heiko Stuebner
5807f4ee6d drm/rockchip: vop2: fix rk3588 dp+dsi maxclk verification
The clock is in Hz while the value checked against is in kHz, so
actual frequencies will never be able to be below to max value.
Fix this by specifying the max-value in Hz too.

Fixes: 5a028e8f06 ("drm/rockchip: vop2: Add support for rk3588")
Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Acked-by: Andy Yan <andyshrk@163.com>
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Tested-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20241115151131.416830-1-heiko@sntech.de
2024-11-28 22:07:18 +01:00
Piotr Zalewski
4f53777634 rockchip/drm: vop2: add support for gamma LUT
Add support for gamma LUT in VOP2 driver. The implementation was inspired
by one found in VOP1 driver. Blue and red channels in gamma LUT register
write were swapped with respect to how gamma LUT values are written in
VOP1. Gamma LUT port selection was added before the write of new gamma LUT
table.

If the current SoC is rk356x, check if no other CRTC has gamma LUT enabled
in atomic_check (only one video port can use gamma LUT at a time) and
disable gamma LUT before the LUT table write.

If the current SoC isn't rk356x, "seamless" gamma lut update is performed
similarly to how it was done in the case of RK3399 in VOP1[1]. In seamless
update gamma LUT disable before the write isn't necessary, check if no
other CRTC has gamma LUT enabled is also not necessary, different register
is being used to select gamma LUT port[2] and after setting DSP_LUT_EN bit,
GAMMA_UPDATE_EN bit is set[3].

Gamma size is set and drm color management is enabled for each video port's
CRTC except ones which have no associated device.

Patch was tested on RK3566 (Pinetab2). When using userspace tools
which set eg. constant color temperature no issues were noticed. When
using userspace tools which adjust eg. color temperature the slight screen
flicker is visible probably because of gamma LUT disable needed in the
case of RK356x before gamma LUT write.

Compare behaviour of eg.:
```
gammastep -O 3000
```

To eg.:
```
gammastep -l 53:23 -t 6000:3000
```

In latter case color temperature is slowly adjusted at the beginning which
causes screen to slighly flicker. Then it adjusts every few seconds which
also causes slight screen flicker.

[1] https://lists.infradead.org/pipermail/linux-rockchip/2021-October/028132.html
[2] https://lore.kernel.org/linux-rockchip/48249708-8c05-40d2-a5d8-23de960c5a77@rock-chips.com/
[3] https://github.com/radxa/kernel/blob/linux-6.1-stan-rkr1/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c#L3437

Helped-by: Daniel Stone <daniel@fooishbar.org>
Helped-by: Dragan Simic <dsimic@manjaro.org>
Helped-by: Diederik de Haas <didi.debian@cknow.org>
Helped-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Piotr Zalewski <pZ010001011111@proton.me>
Reviewed-by: Andy Yan <andyshrk@163.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20241101185545.559090-3-pZ010001011111@proton.me
2024-11-09 23:44:30 +01:00
Andy Yan
712ec5de38 drm/rockchip: vop2: Don't spam logs in atomic update
Demote the error message to drm_dbg_kms to only print the message
if the respective debug messages are enabled.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20241028074140.382199-1-andyshrk@163.com
2024-11-09 23:34:34 +01:00
Andy Yan
2bdb481bf7 drm/rockchip: vop2: Fix the port mux of VP2
The port mux of VP2 should be RK3568_OVL_PORT_SET__PORT2_MUX.

Fixes: 604be85547 ("drm/rockchip: Add VOP2 driver")
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20240422101905.32703-2-andyshrk@163.com
2024-04-25 16:58:28 +02:00
Detlev Casanova
e80c219f52 drm/rockchip: vop2: Do not divide height twice for YUV
For the cbcr format, gt2 and gt4 are computed again after src_h has been
divided by vsub.

As src_h as already been divided by 2 before, introduce cbcr_src_h and
cbcr_src_w to keep a copy of those values to be used for cbcr gt2 and
gt4 computation.

This fixes yuv planes being unaligned vertically when down scaling to
1080 pixels from 2160.

Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com>
Fixes: 604be85547 ("drm/rockchip: Add VOP2 driver")
Acked-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20240414182706.655270-1-detlev.casanova@collabora.com
2024-04-19 13:05:35 +02:00
Harshit Mogalapalli
b6ddaa63f7 drm/rockchip: vop2: add a missing unlock in vop2_crtc_atomic_enable()
Unlock before returning on the error path.

Fixes: 5a028e8f06 ("drm/rockchip: vop2: Add support for rk3588")
Signed-off-by: Harshit Mogalapalli <harshit.m.mogalapalli@oracle.com>
Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20240119190841.1619443-1-harshit.m.mogalapalli@oracle.com
2024-02-13 20:33:39 +01:00
Cristian Ciocaltea
196da3f3f7 drm/rockchip: vop2: Drop unused if_dclk_rate variable
Commit 5a028e8f06 ("drm/rockchip: vop2: Add support for rk3588")
introduced a variable which ended up being unused:

rockchip_drm_vop2.c:1688:23: warning: variable ‘if_dclk_rate’ set but not used [-Wunused-but-set-variable]

This has been initially used as part of a formula to compute the clock
dividers, but eventually it has been replaced by static values.

Drop the variable declaration and move its assignment to the comment
block, to serve as documentation of how the constants have been
generated.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20240105174007.98054-1-cristian.ciocaltea@collabora.com
2024-01-05 21:34:24 +01:00
Cristian Ciocaltea
38709af26c drm/rockchip: vop2: Drop superfluous include
The rockchip_drm_fb.h header contains just a single function which is
not directly used by the VOP2 driver.  Drop the unnecessary include.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20240104143951.85219-1-cristian.ciocaltea@collabora.com
2024-01-04 17:17:25 +01:00
Jiapeng Chong
f40e61eb53 drm/rockchip: vop2: clean up some inconsistent indenting
No functional modification involved.

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c:1708 rk3588_calc_cru_cfg() warn: inconsistent indenting.

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=7778
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20231219062635.100718-1-jiapeng.chong@linux.alibaba.com
2023-12-25 00:50:33 +01:00
Andy Yan
3ee348eb36 drm/rockchip: vop2: Avoid use regmap_reinit_cache at runtime
Marek Report a possible irq lock inversion dependency warning when
commit 81a06f1d02 ("Revert "drm/rockchip: vop2: Use regcache_sync()
to fix suspend/resume"") lands linux-next.

I can reproduce this warning with:
CONFIG_PROVE_LOCKING=y
CONFIG_DEBUG_LOCKDEP=y

It seems than when use regmap_reinit_cache at runtime whith Mark's
commit 3d59c22bbb ("drm/rockchip: vop2: Convert to use maple tree
register cache"), it will trigger a possible irq lock inversion dependency
warning.

One solution is switch back to REGCACHE_RBTREE, but it seems that
REGCACHE_MAPLE is the future, so I avoid using regmap_reinit_cache,
and drop all the regcache when vop is disabled, then we get a fresh
start at next enbable time.

Fixes: 81a06f1d02 ("Revert "drm/rockchip: vop2: Use regcache_sync() to fix suspend/resume"")
Reported-by: Marek Szyprowski <m.szyprowski@samsung.com>
Closes: https://lore.kernel.org/all/98a9f15d-30ac-47bf-9b93-3aa2c9900f7b@samsung.com/
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
[dropped the large kernel log of the lockdep report from the message]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20231217084415.2373043-1-andyshrk@163.com
2023-12-25 00:46:52 +01:00
Andy Yan
9d7fe7704d drm/rockchip: vop2: rename VOP_FEATURE_OUTPUT_10BIT to VOP2_VP_FEATURE_OUTPUT_10BIT
VOP2 has multiple independent video ports with different
feature, so rename VOP_FEATURE_OUTPUT_10BIT to
VOP2_VP_FEATURE_OUTPUT_10BIT for more clearly meaning.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20231211115931.1785495-1-andyshrk@163.com
2023-12-13 15:37:30 +01:00
Andy Yan
5a028e8f06 drm/rockchip: vop2: Add support for rk3588
VOP2 on rk3588:

Four video ports:
VP0 Max 4096x2160
VP1 Max 4096x2160
VP2 Max 4096x2160
VP3 Max 2048x1080

4 4K Cluster windows with AFBC/line RGB and AFBC-only YUV support
4 4K Esmart windows with line RGB/YUV support

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20231211115919.1785435-1-andyshrk@163.com
2023-12-13 15:37:28 +01:00
Andy Yan
c408af1afc drm/rockchip: vop2: rename grf to sys_grf
The vop2 need to reference more grf(system grf, vop grf, vo0/1 grf,etc)
in the upcoming rk3588.

So we rename the current system grf to sys_grf.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20231211115826.1785190-1-andyshrk@163.com
2023-12-13 15:17:53 +01:00
Andy Yan
075a5b3969 drm/rockchip: vop2: set bg dly and prescan dly at vop2_post_config
We need to setup background delay cycle and prescan
delay cycle when a mode is enable to avoid trigger
POST_BUF_EMPTY irq on rk3588.

Note: RK356x has no such requirement.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20231211115815.1785131-1-andyshrk@163.com
2023-12-13 15:17:52 +01:00
Andy Yan
dd49ee4614 drm/rockchip: vop2: Set YUV/RGB overlay mode
Set overlay mode register according to the
output mode is yuv or rgb.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20231211115805.1785073-1-andyshrk@163.com
2023-12-13 15:17:50 +01:00
Andy Yan
d1f8face0f drm/rockchip: vop2: Add write mask for VP config done
The write mask bit is used to make sure when writing
config done bit for one VP will not overwrite the other.

Unfortunately, the write mask bit is missing on
rk3566/8, that means when we write to these bits,
it will not take any effect.

We need this to make the vop work properly after
rk3566/8 variants.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20231211115752.1785013-1-andyshrk@163.com
2023-12-13 15:17:49 +01:00
Andy Yan
20529a6830 drm/rockchip: vop2: clear afbc en and transform bit for cluster window at linear mode
The enable bit and transform offset of cluster windows should be
cleared when it work at linear mode, or we may have a iommu fault
issue on rk3588 which cluster windows switch between afbc and linear
mode.

As the cluster windows of rk3568 only supports afbc format
so is therefore not affected.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20231211115741.1784954-1-andyshrk@163.com
2023-12-13 15:17:48 +01:00
Andy Yan
bebad6bd4f drm/rockchip: vop2: set half_block_en bit in all mode
At first we thought the half_block_en bit in AFBCD_CTRL register
only work in afbc mode. But the fact is that it control the line
buffer in all mode(afbc/tile/linear), so we need configure it in
all case.

As the cluster windows of rk3568 only supports afbc format
so is therefore not affected.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20231211115730.1784893-1-andyshrk@163.com
2023-12-13 15:17:47 +01:00
Andy Yan
81a06f1d02 Revert "drm/rockchip: vop2: Use regcache_sync() to fix suspend/resume"
This reverts commit b63a553e8f.

regcache_sync will try to reload the configuration in regcache to
hardware, but the registers of 4 Cluster windows and Esmart1/2/3 on
the upcoming rk3588 can not be set successfully before internal PD
power on.

Also it's better to keep the hardware register as it is before we really
enable it.

So let's revert this version, and keep the first version:
commit afa965a45e ("drm/rockchip: vop2: fix suspend/resume")

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20231211115719.1784834-1-andyshrk@163.com
2023-12-13 15:17:46 +01:00
Jonas Karlman
5fc6aa7db0 drm/rockchip: vop2: Add NV20 and NV30 support
Add support for the 10-bit 4:2:2 and 4:4:4 formats NV20 and NV30.

These formats can be tested using modetest [1]:

  modetest -P <plane_id>@<crtc_id>:1920x1080@<format>

e.g. on a ROCK 3 Model A (rk3568):

  modetest -P 43@67:1920x1080@NV20 -F tiles,tiles
  modetest -P 43@67:1920x1080@NV30 -F smpte,smpte

[1] https://gitlab.freedesktop.org/mesa/drm/-/merge_requests/329

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Christopher Obbard <chris.obbard@collabora.com>
Tested-by: Christopher Obbard <chris.obbard@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20231025213248.2641962-1-jonas@kwiboo.se
2023-11-20 18:00:46 +01:00
Andy Yan
bfd8a5c228 drm/rockchip: vop2: Add more supported 10bit formats
Add 10 bit RGB and AFBC based YUV format supported
by vop2.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20231018094318.2476081-1-andyshrk@163.com
2023-10-24 21:29:12 +02:00
Andy Yan
01d5a75370 drm/rockchip: vop2: remove the unsupported format of cluster window
The cluster window on vop2 doesn't support linear yuv
format(NV12/16/24), it only support afbc based yuv
format(DRM_FORMAT_YUV420_8BIT/10BIT), which will be
added in next patch.

Fixes: 604be85547 ("drm/rockchip: Add VOP2 driver")
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20231018094239.2475851-1-andyshrk@163.com
2023-10-24 21:29:11 +02:00
Andy Yan
45ad07c705 drm/rockchip: vop: fix format bpp calculation
We can't rely on cpp for bpp calculation as the cpp of
some formats(DRM_FORMAT_YUV420_8BIT/10BIT, etc) is zero.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20231018094210.2475771-1-andyshrk@163.com
2023-10-24 21:29:10 +02:00
Andy Yan
dc00748adc drm/rockchip: remove NR_LAYERS macro on vop2
There are 8 layers on rk3588, so a fix defined macro is
not appropriate.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20231013122051.1594164-1-andyshrk@163.com
2023-10-16 15:05:24 +02:00
Andy Yan
ac1c11c23f drm/rockchip: remove unused struct in vop2
These structs are undefined and un used.

Fixes: 604be85547 ("drm/rockchip: Add VOP2 driver")
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20231013122036.1594090-1-andyshrk@163.com
2023-10-16 15:05:23 +02:00
Mark Brown
3d59c22bbb drm/rockchip: vop2: Convert to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache.

Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20231001-drm-rockchip-maple-v1-1-ca396ab75be7@kernel.org
2023-10-09 21:25:14 +02:00
Michael Tretter
eb23cffdd7 drm/rockchip: vop2: Demote message in mod_supported to drm_dbg_kms
Checking if a modifier is supported by a plane is normal behavior. It is
normal that a plane may not support certain modifiers. Failing the check
doesn't justify an error message in the kernel log and may mislead
users.

Demote the error message to drm_dbg_kms to only print the message if the
respective debug messages are enabled. This is similar to the behavior
in rockchip_drm_vop.c.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20231009103753.830458-1-m.tretter@pengutronix.de
2023-10-09 21:20:04 +02:00
Jonas Karlman
4d49d87b36 drm/rockchip: vop2: Add missing call to crtc reset helper
Add missing call to crtc reset helper to properly vblank reset.

Also move vop2_crtc_reset and call vop2_crtc_destroy_state to simplify
and remove duplicated code.

Fixes: 604be85547 ("drm/rockchip: Add VOP2 driver")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20230621223311.2239547-6-jonas@kwiboo.se
2023-08-12 23:53:36 +02:00
Jonas Karlman
342f7e4967 drm/rockchip: vop2: Don't crash for invalid duplicate_state
It's possible for users to try to duplicate the CRTC state even when the
state doesn't exist. drm_atomic_helper_crtc_duplicate_state() (and other
users of __drm_atomic_helper_crtc_duplicate_state()) already guard this
with a WARN_ON() instead of crashing, so let's do that here too.

Fixes: 604be85547 ("drm/rockchip: Add VOP2 driver")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20230621223311.2239547-5-jonas@kwiboo.se
2023-08-12 23:53:36 +02:00
Rob Herring
722d4f06e5 drm: Explicitly include correct DT includes
The DT of_device.h and of_platform.h date back to the separate
of_platform_bus_type before it as merged into the regular platform bus.
As part of that merge prepping Arm DT support 13 years ago, they
"temporarily" include each other. They also include platform_device.h
and of.h. As a result, there's a pretty much random mix of those include
files used throughout the tree. In order to detangle these headers and
replace the implicit includes with struct declarations, users need to
explicitly include the correct includes.

Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Reviewed-by: Steven Price <steven.price@arm.com>
Acked-by: Liviu Dudau <liviu.dudau@arm.com>
Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Acked-by: Robert Foss <rfoss@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230714174545.4056287-1-robh@kernel.org
2023-07-21 09:12:43 +02:00
Linus Torvalds
c8cc58e289 Merge tag 'drm-next-2023-04-24' of git://anongit.freedesktop.org/drm/drm
Pull drm updates from Dave Airlie:
 "There is a new Qualcomm accel driver for their QAIC, dma-fence got a
  deadline feature added, lots of refactoring around fbdev emulation,
  and the usual pre-release hw enablements from AMD and Intel and fixes
  everywhere.

  New drivers:
   - add QAIC acceleration driver

  dma-buf:
   - constify kobj_type structs
   - Reject prime DMA-Buf attachment if get_sg_table is missing.

  fbdev:
   - cmdline parser fixes
   - implement fbdev emulation for GEM DMA drivers
   - always use shadow buffer in fbdev emulation helpers

  dma-fence:
   - add deadline hint to fences
   - signal private stub fence

  core:
   - improve DisplayID 2.0 and EDID parsing
   - add gem eviction function + callback
   - prep to convert shmem helper to GEM resv lock
   - move suballocator from radeon/amdgpu to core for Xe
   - HPD polling fixes
   - Documentation improvements
   - Add atomic enable_plane callback
   - use tgid instead of pid for client tracking
   - DP: Add SDP Error Detection Configuration Register
   - Add prime import/export to vram-helper
   - use pci aperture helpers in more drivers

  panel:
   - Radxa 8/10HD support
   - Samsung AMD495QA01 support
   - Elida KD50T048A
   - Sony TD4353
   - Novatek NT36523
   - STARRY 2081101QFH032011-53G
   - B133UAN01.0
   - AUO NE135FBM-N41

  i915:
   - More MTL enabling
   - fix s/r problems with MEI/PXP
   - Implement fb_dirty for PSR,FBC,DRRS fixes
   - Fix eDP+DSI dual panel systems
   - Fix issue #6333: "list_add corruption" and full system lockup from
     performance monitoring
   - Don't use stolen memory or BAR for ring buffers on LLC platforms
   - Make sure DSM size has correct 1MiB granularity on Gen12+
   - Whitelist COMMON_SLICE_CHICKEN3 for UMD access on Gen12+
   - Add engine TLB invalidation for Meteorlake
   - Fix GSC races on driver load/unload on Meteorlake+
   - Make kobj_type structures constant
   - Move fd_install after last use of fence
   - wm/vblank refactoring
   - display code refactoring
   - Create GSC submission targeting HDCP and PXP usages on MTL+
   - Enable HDCP2.x via GSC CS
   - Fix context runtime accounting on sysfs fdinfo for heavy workloads
   - Use i915 instead of dev_priv insied the file_priv structure
   - Replace fake flex-array with flexible-array member

  amdgpu:
   - Make kobj structures const
   - Generalize dmabuf import to work with KFD
   - Add capped/uncapped workload handling for supported APUs
   - Expose additional memory stats via fdinfo
   - Register vga_switcheroo for apple-gmux
   - Initial NBIO7.9, GC 9.4.3, GFXHUB 1.2, MMHUB 1.8 support
   - Initial DC FAM infrastructure
   - Link DC backlight to connector device rather than PCI device
   - Add sysfs nodes for secondary VCN clocks

  amdkfd:
   - Make kobj structures const
   - Support for exporting buffers via dmabuf
   - Multi-VMA page migration fixes
   - initial GC 9.4.3 support

  radeon:
   - iMac fix
   - convert to client based fbdev emulation

  habanalabs:
   - Add opcodes to the CS ioctl to allow user to stall/resume specific
     engines inside Gaudi2.
   - INFO ioctl the amount of device memory that the driver and f/w
     reserve for themselves.
   - INFO ioctl a bit-mask of the available rotator engines
   - INFO ioctl the register's address of the f/w that should be used to
     trigger interrupts
   - INFO ioctl two new opcodes to fetch information on h/w and f/w
     events
   - Enable graceful reset mechanism for compute-reset.
   - Align to the latest firmware specs.
   - Enforce the release order of the compute device and dma-buf.

  msm:
   - UBWC decoder programming rework
   - SM8550, SM8450 bindings update
   - uapi C++ fix
   - a3xx and a4xx devfreq support
   - GPU and GEM updates to avoid allocations which could trigger
     reclaim (shrinker) in fence signaling path
   - dma-fence deadline hint support and wait-boost
   - a640/650 speed bin support

  cirrus:
   - convert to regular atomic helpers
   - add damage clipping

  mediatek:
   - 10-bit overlay support
   - mt8195 support
   - Only trigger DRM HPD events if bridge is attached
   - Change the aux retries times when receiving AUX_DEFER

  rockchip:
   - add 4K support

  vc4:
   - use drm_gem_objects

  virtio:
   - allow KMS support to be disabled
   - add damage clipping

  vmwgfx:
   - buffer object lifetime fixes

  exynos:
   - move MIPI DSI driver to drm bridge for iMX sharing
   - use kernel fbdev emulation

  panfrost:
   - add support for mali MT81xx devices
   - add speed binning support

  lima:
   - add usage stats

  tegra:
   - fbdev client conversion

  vkms:
   - Add primary plane positioning support"

* tag 'drm-next-2023-04-24' of git://anongit.freedesktop.org/drm/drm: (1495 commits)
  drm/i915/dp_mst: Fix active port PLL selection for secondary MST streams
  drm/exynos: Implement fbdev emulation as in-kernel client
  drm/exynos: Initialize fbdev DRM client
  drm/exynos: Remove fb_helper from struct exynos_drm_private
  drm/exynos: Remove struct exynos_drm_fbdev
  drm/exynos: Remove exynos_gem from struct exynos_drm_fbdev
  drm/i915: Fix memory leaks in i915 selftests
  drm/i915: Make intel_get_crtc_new_encoder() less oopsy
  drm/i915/gt: Avoid out-of-bounds access when loading HuC
  drm/amdgpu: add some basic elements for multiple XCD case
  drm/amdgpu: move vmhub out of amdgpu_ring_funcs (v4)
  Revert "drm/amdgpu: enable ras for mp0 v13_0_10 on SRIOV"
  drm/amdgpu: add common ip block for GC 9.4.3
  drm/amd/display: Add logging when DP link training Clock recovery is Successful
  drm/amdgpu: add common early init support for GC 9.4.3
  drm/amdgpu: switch to v9_4_3 gfx_funcs callbacks for GC 9.4.3
  drm/amd/display: Add logging when setting DP sink power state fails
  drm/amdkfd: Add gfx_target_version for GC 9.4.3
  drm/amdkfd: Enable HW_UPDATE_RPTR on GC 9.4.3
  drm/amdgpu: reserve the old gc_11_0_*_mes.bin
  ...
2023-04-25 16:12:15 -07:00
Sascha Hauer
b63a553e8f drm/rockchip: vop2: Use regcache_sync() to fix suspend/resume
afa965a45e ("drm/rockchip: vop2: fix suspend/resume") uses
regmap_reinit_cache() to fix the suspend/resume issue with the VOP2
driver. During discussion it came up that we should rather use
regcache_sync() instead. As the original patch is already applied
fix this up in this follow-up patch.

Fixes: afa965a45e ("drm/rockchip: vop2: fix suspend/resume")
Cc: stable@vger.kernel.org
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20230417123747.2179695-1-s.hauer@pengutronix.de
2023-04-17 23:40:40 +02:00
Sascha Hauer
afa965a45e drm/rockchip: vop2: fix suspend/resume
During a suspend/resume cycle the VO power domain will be disabled and
the VOP2 registers will reset to their default values. After that the
cached register values will be out of sync and the read/modify/write
operations we do on the window registers will result in bogus values
written. Fix this by re-initializing the register cache each time we
enable the VOP2. With this the VOP2 will show a picture after a
suspend/resume cycle whereas without this the screen stays dark.

Fixes: 604be85547 ("drm/rockchip: Add VOP2 driver")
Cc: stable@vger.kernel.org
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20230413144347.3506023-1-s.hauer@pengutronix.de
2023-04-17 11:39:46 +02:00
Alfredo Cruz
4ab9157c7e drm/rockchip: vop2: Add error check to devm_regmap_init_mmio
devm_regmap_init_mmio() may return an invalid pointer in case of an error.
This patch adds the corresponding IS_ERR check to vop2->map.

Signed-off-by: Alfredo Cruz <alfredo.carlon@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20230322224411.15612-1-alfredo.carlon@gmail.com
2023-03-23 00:18:58 +01:00
Tom Rix
e88adb4ac2 drm/rockchip: vop2: fix uninitialized variable possible_crtcs
clang reportes this error
drivers/gpu/drm/rockchip/rockchip_drm_vop2.c:2322:8: error:
  variable 'possible_crtcs' is used uninitialized whenever 'if'
  condition is false [-Werror,-Wsometimes-uninitialized]
                        if (vp) {
                            ^~
drivers/gpu/drm/rockchip/rockchip_drm_vop2.c:2336:36: note:
  uninitialized use occurs here
                ret = vop2_plane_init(vop2, win, possible_crtcs);
                                                 ^~~~~~~~~~~~~~
drivers/gpu/drm/rockchip/rockchip_drm_vop2.c:2322:4:
  note: remove the 'if' if its condition is always true
                        if (vp) {
                        ^~~~~~~~

The else-statement changes the win->type to OVERLAY without setting the
possible_crtcs variable.  Rework the block, initialize possible_crtcs to
0 to remove the else-statement.  Split the else-if-statement out to its
own if-statement so the OVERLAY check will catch when the win-type has
been changed.

Fixes: 368419a2d4 ("drm/rockchip: vop2: initialize possible_crtcs properly")
Signed-off-by: Tom Rix <trix@redhat.com>
Acked-by: Michael Riesch <michael.riesch@wolfvision.net>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20230316132302.531724-1-trix@redhat.com
2023-03-22 20:36:52 +01:00
Gerald Loacker
66ab57574f drm/rockchip: vop2: add polarity flags to RGB output
Use h/v-sync and pixel clock polarity flags for RGB output. For all other
outputs this is already implemented.

Signed-off-by: Gerald Loacker <gerald.loacker@wolfvision.net>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20230302123949.957998-1-gerald.loacker@wolfvision.net
2023-03-09 02:01:32 +01:00
Jacob Keller
3b4db36c4c drm/rockchip: vop2: use struct_size() in vop2_bind
Use the overflow-protected struct_size() helper macro to compute the
allocation size of the vop2 data structure.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Cc: Sandy Huang <hjc@rock-chips.com>
Cc: Heiko Stübner <heiko@sntech.de>
Cc: David Airlie <airlied@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20230223013533.1707706-1-jacob.e.keller@intel.com
2023-03-09 01:58:55 +01:00
Michael Riesch
c66c6d7c47 drm/rockchip: vop2: add support for the rgb output block
The Rockchip VOP2 features an internal RGB output block, which can be
attached any video port of the VOP2. Add support for this output block.

Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20230124054706.3921383-6-michael.riesch@wolfvision.net
2023-02-05 15:21:39 +01:00
Michael Riesch
cddddc066b drm/rockchip: vop2: use symmetric function pair vop2_{create,destroy}_crtcs
Let the function name vop2_create_crtcs reflect that the function creates
multiple CRTCS. Also, use a symmetric function pair to create and destroy
the CRTCs and the corresponding planes.

Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20230124054706.3921383-5-michael.riesch@wolfvision.net
2023-02-05 15:21:38 +01:00