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Author SHA1 Message Date
Sam Protsenko
d56a8e9c7a dt-bindings: soc: samsung: Fix I2C clocks order in USI binding example 
Now that HSI2C binding [1] is converted to dt-schema format, it reveals
incorrect HSI2C clocks order in USI binding example:

    .../exynos-usi.example.dt.yaml:
    i2c@13820000: clock-names:0: 'hsi2c' was expected
    From schema: .../i2c-exynos5.yaml

    .../exynos-usi.example.dt.yaml:
    i2c@13820000: clock-names:1: 'hsi2c_pclk' was expected
    From schema: .../i2c-exynos5.yaml

Change HSI2C clock order in USI binding example to satisfy HSI2C binding
requirements and fix above warnings.

[1] Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Link: https://lore.kernel.org/r/20211214170924.27998-1-semen.protsenko@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
 2021-12-15 08:34:47 +01:00
Sam Protsenko
e522ae91b8 dt-bindings: soc: samsung: Add Exynos USI bindings 
Add constants for choosing USIv2 configuration mode in device tree.
Those are further used in USI driver to figure out which value to write
into SW_CONF register. Also document USIv2 IP-core bindings.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211204195757.8600-2-semen.protsenko@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
 2021-12-13 12:03:22 +01:00