Commit Graph

9 Commits

Author SHA1 Message Date
Ilia Mirkin
bc60c90f47 drm/nouveau/pci/msi: disable MSI on big-endian platforms by default
It appears that MSI does not work on either G5 PPC nor on a E5500-based
platform, where other hardware is reported to work fine with MSI.

Both tests were conducted with NV4x hardware, so perhaps other (or even
this) hardware can be made to work. It's still possible to force-enable
with config=NvMSI=1 on load.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: stable@vger.kernel.org
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-08-22 18:04:36 +10:00
Ben Skeggs
d398119034 drm/nouveau/mc: take nvkm_device as argument to public functions
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Ben Skeggs
56d06fa29e drm/nouveau/core: remove pmc_enable argument from subdev ctor
These are now specified directly in the MC subdev.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20 14:43:04 +10:00
Karol Herbst
bcc19d9bf5 drm/nouveau/pci: implement generic code for pcie speed change
v2: rename and group functions
v4: change copyright information
    move printing of pcie speeds into oneinit,
    rename all pcie functions to nvkm_pcie_*
    don't try to raise the pcie version when no higher one is supported
v5: revert Copyright changes and rename nvkm_pcie_raise_version to nvkm_pcie_set_version
v6: remove some useless pci_is_pcie checks and rework messages

Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
2016-01-11 11:30:20 +10:00
Pierre Moreau
5d5b43f59b drm/nouveau/pci: Handle 5-bit and 8-bit tag field
If the hardware supports extended tag field (8-bit ones), then enable it.

This is usually done by the VBIOS, but not on some MBPs (see fdo#86537).

In case extended tag field is not supported, 5-bit tag field is used which
limits the possible number of requests to 32. Apparently bits 7:0 of
0x08841c stores some number of outstanding requests, so cap it to 32 if
extended tag is unsupported.

Fixes: fdo#86537

v2: Restrict changes to chipsets >= 0x84
v3:
  * Add nvkm_pci_mask to pci.h
  * Mask bit 8 before setting it
v4:
  * Rename `add` argument of nvkm_pci_mask to `value`
  * Move code from nvkm_pci_init to g84_pci_init and remove PCIe and chipset
    checks
v5:
  * Rebase code on latest PCI structure
  * Restore PCIe check
  * Fix namings in nvkm_pci_mask
  * Rephrase part of the commit message

Signed-off-by: Pierre Moreau <pierre.morrow@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-11-03 15:02:18 +10:00
Ben Skeggs
779d16aacc drm/nouveau/pci: prepare for chipset-specific initialisation tasks
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-11-03 15:02:18 +10:00
Ben Skeggs
340b0e7c50 drm/nouveau/pci: merge agp handling from nouveau drm
This commit reinstates the pre-DEVINIT AGP fiddling that was broken in
an earlier commit.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:49 +10:00
Ben Skeggs
2b700825e7 drm/nouveau/mc: move device irq handling to platform-specific code
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:48 +10:00
Ben Skeggs
0a34fb3149 drm/nouveau/pci: new subdev
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:48 +10:00