bybrooklyn/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-04-24 09:35:52 -04:00
Code Issues Packages Projects Releases Wiki Activity
737,106 Commits 1 Branch 927 Tags
d3e4eccbb8ddd2bcf906a9c2a43980b00a568eb4
Commit Graph

81 Commits

Author SHA1 Message Date
Alex Deucher
5ba4fa35d3 drm/amdgpu: only check for ECC on Vega10 
RV doesn't support it.

Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
 2018-01-18 16:10:36 -05:00
Christian König
c4f46f22c4 drm/amdgpu: rename vm_id to vmid 
sed -i "s/vm_id/vmid/g" drivers/gpu/drm/amd/amdgpu/*.c
sed -i "s/vm_id/vmid/g" drivers/gpu/drm/amd/amdgpu/*.h

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-27 11:34:02 -05:00
Christian König
620f774f46 drm/amdgpu: separate VMID and PASID handling 
Move both into the new files amdgpu_ids.[ch]. No functional change.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-27 11:33:52 -05:00
Christian König
6a42fd6fbf drm/amdgpu: implement 2+1 PD support for Raven v3 
Instead of falling back to 2 level and very limited address space use
2+1 PD support and 128TB + 512GB of virtual address space.

v2: cleanup defines, rebase on top of level enum
v3: fix inverted check in hardware setup

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-and-Tested-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-18 11:53:08 -05:00
Alex Deucher
2543e28a81 drm/amdgpu: rename amdgpu_*_location functions 
add device to the name for consistency.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-18 10:59:28 -05:00
Alex Deucher
9c3f2b5474 drm/amdgpu: rename amdgpu_program_register_sequence 
add device for consistency with other functions in this file.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-18 10:59:13 -05:00
Alex Deucher
a7ea6548a5 drm/amdgpu: setup the shared and private apertures on gfx9 
Same as previous asics.  This was not yet set for gfx9.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-15 17:15:09 -05:00
Alex Deucher
bf383fb64e drm/amdgpu: convert nbio to use callbacks (v2) 
Cleans up and consolidates all of the per-asic logic.

v2: squash in "drm/amdgpu: fix NULL err for sriov detect" (Chunming)

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-13 17:28:07 -05:00
Christian König
3de676d8e7 drm/amdgpu: allow get_vm_pde to change flags as well 
And also provide the level for which we need a PDE.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-12 14:46:19 -05:00
Shaoyun Liu
4fd09a19a6 drm/admgpu: Reduce the usage of soc15ip.h 
Remove the header where it's not used.

Acked-by: Christian Konig <christian.koenig@amd.com>
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-08 11:35:19 -05:00
Shaoyun Liu
946a4d5b30 drm/amdgpu: Avoid use SOC15_REG_OFFSET in static const array 
Handle dynamic offsets correctly in static arrays.

Acked-by: Christian Konig <christian.koenig@amd.com>
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-08 11:18:51 -05:00
Christian König
f3368128ba drm/amdgpu: move validation of the VM size into the VM code 
This moves validation of the VM size parameter into amdgpu_vm_adjust_size().

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:48:30 -05:00
Christian König
b38f41ebb8 drm/amdgpu: unify VM size handling of Vega10 with older generation 
One function to rule them all.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:48:29 -05:00
Feifei Xu
fb960bd283 drm/amd/include:cleanup vega10 header files. 
Remove asic_reg/vega10 folder.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:48:22 -05:00
Feifei Xu
65417d9f55 drm/amd/include:cleanup vega10 mmhub header files. 
Cleanup asic_reg/vega10/MMHUB folder.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:48:20 -05:00
Feifei Xu
cde5c34f63 drm/amd/include:cleanup vega10 gc header files. 
Cleanup asic_reg/vega10/GC folder.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:48:20 -05:00
Feifei Xu
135d4b10d3 drm/amd/include:cleanup vega10 dce header files. 
Cleanup asic_reg/vega10/DC folder.Remove dce_12_0_default.h.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:48:18 -05:00
Feifei Xu
90c7a9358f drm/amd/include: cleanup vega10 umc header files. 
Remove asic/vega10/UMC folder.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:48:18 -05:00
Feifei Xu
6ce682251d drm/amd/include:cleanup vega10 athub header files. 
Cleanup asic_reg/vega10/ATHUB folder,remove unused files.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:48:17 -05:00
Feifei Xu
75199b8c7f drm/amd/include:cleanup vega10 hdp header files. 
Cleanup asic_reg/vega10/HDP folder, remove hdp_4_0_default.h

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:48:16 -05:00
Monk Liu
ce1b1b66cd drm/amdgpu:partially revert 1cfd8e237f0318e330190ac21d63c58ae6a1f66c 
found RING0 test fail after S3 resume regression, which is
introduced by 1cfd8e237f0318e330190ac21d63c58ae6a1f66c

Because after suspend VRAM will be cleared, so driver must
unpin the GART table(resident in VRAM) during suspend so it
can be evicted to system ram and must correspondingly pin it
during resume so the GART table could be restored to VRAM.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:48:15 -05:00
Alex Deucher
5a16008f53 drm/amdgpu/gmc9: make some ECC messages debug only 
To avoid spamming the logs on non-ECC boards.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:47:56 -05:00
Monk Liu
f59548c882 drm/amdgpu:fix NULL pointer access during drv remove 
NULL pointer is because original logic will step into
set_pde_pte() even after the gart.ptr is freed due to
there are twice gart_unbind() on all gart area.

also, there are other minor fixes:
1,since gart_init only create dummy page, the corresponding
gart_fini shouldn't do more like unbinding all GART, this is
unnecessary because in driver fini stage all GART unbinding
had already been done during each IP's SW_FINI (GMC's
SW_FINI is the last one called), so remove the step
for the GART unbinding in gart_fini().

2,gart_fini() is already invoked during each GMC IP's gart_fini
routine,e.g. gmc_vx_0_gart_fini(), so no need to manually
call it during ttm_fini().

3,amdgpu_gem_force_release() should be put ahead of
amdgpu_vm_manager_fini()

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:47:50 -05:00
Monk Liu
c79ee7d8c6 drm/amdgpu:cleanup GMC & gart garbage function 
for gart_ram_alloc/free, they are never used in driver thus
ripe them out totally.

for gart_vram_pin/unpin, they are not needed becuase we can
use bo_creat_kernel/free to replace the original manual way
in the gart_vram_alloc/free, thus gart_vram_pin/unpin can
also be riped out.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:47:50 -05:00
David Panariti
02bab92328 drm/amdgpu: Add ability to determine and report if board supports ECC. 
Make initialization code check the ECC related registers, which are initialized
by the VBIOS, to see if ECC is present and initialized and DRM_INFO() the
result.

Signed-off-by: David Panariti <David.Panariti@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:47:48 -05:00
Christian König
fdd5faaa08 drm/amdgpu: cleanup vm_size handling 
It's pointless to have the same value twice, just always use max_pfn.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:47:21 -05:00
Christian König
c47b41a79a drm/amdgpu: remove nonsense const u32 cast on ARRAY_SIZE result 
Not sure what that should originally been good for, but it doesn't seem
to make any sense any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:47:21 -05:00
Christian König
d6895ad39f drm/amdgpu: resize VRAM BAR for CPU access v6 
Try to resize BAR0 to let CPU access all of VRAM.

v2: rebased, style cleanups, disable mem decode before resize,
    handle gmc_v9 as well, round size up to power of two.
v3: handle gmc_v6 as well, release and reassign all BARs in the driver.
v4: rename new function to amdgpu_device_resize_fb_bar,
    reenable mem decoding only if all resources are assigned.
v5: reorder resource release, return -ENODEV instead of BUG_ON().
v6: squash in rebase fix

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-04 16:41:42 -05:00
ozeng
c5066129af drm/amdgpu: Properly allocate VM invalidate eng v2 
v1: Properly allocate TLB invalidation engine to avoid conflict.
v2: Added comments to codes

Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian Konig <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
 2017-11-14 11:35:08 -05:00
Evan Quan
5c58301856 drm/amd/amdgpu: add vega10/raven mmhub/athub golden settings 
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 15:14:18 -04:00
Monk Liu
1d4e0a8c4f drm/amdgpu:hdp flush should be put it initialized 
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 15:14:10 -04:00
Tom St Denis
f053cd478e drm/amd/amdgpu: Cleanup gmc_v9_0_suspend() 
Even though fini returns 0 always it could theoretically
fail in the future.  Might as well return it instead of 0.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-01 12:51:24 -04:00
Tom St Denis
4d9c333a46 drm/amd/amdgpu: Tidy up gmc_v9_0_hw_init() 
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-01 12:51:16 -04:00
Tom St Denis
846347c9f5 drm/amd/amdgpu: Tidy up gmc_v9_0_gart_enable() 
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-01 12:51:09 -04:00
Tom St Denis
ae6d1416fa drm/amd/amdgpu: Simplify gmc_v9_0_vm_fault_interrupt_state() 
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-01 12:51:01 -04:00
Alex Deucher
c3db7b5a55 drm/amdgpu: move default gart size setting into gmc modules 
Move the asic specific code into the IP modules.

Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-08-29 15:27:43 -04:00
Roger He
d07f14be4d drm/amd/amdgpu: expose fragment size as module parameter (v2) 
Allow overrides on the command line.

v2: agd: sqaush in spelling fix and bogus default value warning

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Roger He <Hongbo.He@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-08-17 16:47:43 -04:00
Roger He
e618d306de drm/amd/amdgpu: store fragment_size in vm_manager 
adds fragment_size in the vm_manager structure and
implements hardware setup for it.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Roger He <Hongbo.He@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-08-17 15:46:08 -04:00
Alex Deucher
edca2d0529 drm/amdgpu/gmc9: disable legacy vga features in gmc init 
Needs to be done when the MC is set up.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-07-25 16:37:25 -04:00
Christian König
6f02a69648 drm/amdgpu: consistent name all GART related parts 
Rename symbols from gtt_ to gart_ as appropriate.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-07-14 11:06:30 -04:00
Christian König
ed21c047e9 drm/amdgpu: remove gtt_base_align handling 
Not used any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-07-14 11:06:29 -04:00
Alex Deucher
8d6a5230e1 drm/amdgpu/gmc9: get vram width from atom for Raven 
Get it from the system info table.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-07-14 11:06:18 -04:00
Christian König
011d4bbea9 drm/amdgpu: cleanup initializing gtt_size 
Stop spreading the code over all GMC generations.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-07-14 11:05:53 -04:00
Hawking Zhang
fd66560b80 drm/amdgpu: enable 4 level page table on raven (v3) 
v1: enable 4 level-page table on raven
v2: add back legacy 2 level page table on raven
v3: set num_level in initial switch statement

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-07-14 11:05:44 -04:00
Hawking Zhang
f8386b3521 drm/amdgpu: add new flag AMD_PG_SUPPORT_MMHUB 
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-06-29 12:43:46 -04:00
Hawking Zhang
2fcd43cef6 drm/amdgpu: add mmhub pg init sequence on raven 
MMHub Powergating init sequence.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-06-29 12:43:45 -04:00
Huang Rui
b9509c80df drm/amdgpu: update to use RREG32_SOC15/WREG32_SOC15 for gmc9 
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-06-06 17:00:35 -04:00
Huang Rui
916910ad91 drm/amdgpu: fix the gart table cleared issue for S3 
Something writes over the first 8 MB so reserve this
on vega10 until we root cause it.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-06-06 16:59:30 -04:00
Huang Rui
13052be59a drm/amdgpu: export mmhub get clockgating into gmc 
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-06-06 16:58:56 -04:00
Huang Rui
d5583d4f69 drm/amdgpu: export mmhub set clockgating into gmc 
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-06-06 16:58:49 -04:00