Geert Uytterhoeven
|
c03e2f12a2
|
ARM: dts: r8a77470: Use r8a77470-cpg-mssr binding definitions
Replace the hardcoded clock indices by R8A77470_CLK_* symbols.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
|
2018-07-23 13:33:06 +02:00 |
|
Biju Das
|
f70b0958c0
|
ARM: dts: r8a77470: Add EtherAVB support
Define the generic R8A77470 part of the EtherAVB device node.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Chris Paterson <chris.paterson2@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
|
2018-04-30 09:52:19 +02:00 |
|
Biju Das
|
e469612220
|
ARM: dts: r8a77470: Add SCIF DMA support
Add SCIF DMA support for R8A77470 SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
|
2018-04-25 08:51:21 +02:00 |
|
Biju Das
|
8cdb8f1ab7
|
ARM: dts: r8a77470: Add SCIF support
Describe SCIF ports in the R8A77470 device tree.
Also it fixes the CPG clock index ZS from 6 to 5.
Fixes: 6929dfc591 ("ARM: dts: r8a77470: Initial SoC device tree")
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
|
2018-04-25 08:51:20 +02:00 |
|
Biju Das
|
141fb10294
|
ARM: dts: r8a77470: Add IRQC support
Describe the IRQC interrupt controller in the R8A77470 device tree.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
|
2018-04-25 08:51:02 +02:00 |
|
Biju Das
|
2e5775e3fd
|
ARM: dts: r8a77470: Add SYS-DMAC support
Describe SYS-DMAC0/1 in the R8A77470 device tree.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
|
2018-04-25 08:51:01 +02:00 |
|
Biju Das
|
6929dfc591
|
ARM: dts: r8a77470: Initial SoC device tree
The initial R8A77470 SoC device tree including CPU0, GIC, timer, SYSC, RST,
CPG, and the required clock descriptions.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
|
2018-04-16 16:01:55 +02:00 |
|