Rex Zhu
c7429b3ae9
drm/amd/pp: Add struct profile_mode_setting for smu7
...
Move configurable profiling parameters to struct
profile_mode_setting and initialize current_profile_setting.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-19 14:18:47 -05:00
Rex Zhu
527d9427fa
drm/amd/pp: Delete dead code in powerplay
...
As not support per DPM level optimization,
so delete activity_target array.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-19 14:18:47 -05:00
Rex Zhu
ce91b71c9a
drm/amd/pp: Change activity_target for performance optimization on Polaris
...
And not support perDPM level optimization on Polaris, so
delete sclk activity_target array.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-19 14:18:46 -05:00
Rex Zhu
3c9d1fde7f
drm/amd/pp: Add update_avfs call when set_power_state
...
when Overdrive voltage, need to disable AVFS.
when OverDriv engine clock, need to recalculate
AVFS voltage by disable/enable avfs feature.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-19 14:18:20 -05:00
Rex Zhu
49fd66e5d5
drm/amd/pp: Update smu7 dpm table with OD clock/voltage
...
Delete old OD type code path when populate clk.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-19 14:18:19 -05:00
Rex Zhu
5e4d4fbea5
drm/amd/pp: Implement edit_dpm_table on smu7
...
v2: - check clk against OverDrive limits from VBIOS
- set OD flag when user commit the setting.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-19 14:18:19 -05:00
Rex Zhu
b7e919b940
drm/amd/pp: Disable OD feature on APU/Iceland
...
Not supported on APUs or Iceland.
and still not enabled on CI.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-19 14:18:18 -05:00
Rex Zhu
3abb20264d
drm/amd/pp: Disable OD feature if VBIOS limits
...
Check vbios to determine whether we can enable OD
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-19 14:18:18 -05:00
Alex Deucher
04f618eb3b
drm/amdgpu/powerplay/vega10: fix compute profile name
...
COMPUTER -> COMPUTE
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-19 14:18:15 -05:00
Rex Zhu
6df21b7726
drm/amd/pp: Add OD driver clock/voltage display on smu7
...
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-19 14:17:56 -05:00
Rex Zhu
5d97cf39ff
drm/amd/pp: Add and initialize OD_dpm_table for CI/VI.
...
Add initial infrastructure for manual dpm control.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-19 14:17:56 -05:00
Rex Zhu
11f64ff5f3
drm/amd/pp: Add a new pp feature mask bit for OD feature
...
when this bit was set on module load,
driver will allow the user over/under gpu
clock and voltage through sysfs.
by default, this bit was not set.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-19 14:17:55 -05:00
Rex Zhu
59fc8cde73
drm/amd/pp: Move DPMTABLE_* definitions to common header file
...
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-19 14:17:54 -05:00
Rex Zhu
ee85c07abe
drm/amd/pp: Refine code abbreviate variable name
...
abbreviate variable name number_of_performance_levels
to num_of_pl in struct phm_odn_clock_levels
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-19 14:17:54 -05:00
Rex Zhu
dd70949d90
drm/amd/pp: Store stable Pstate clocks
...
User can use to calculate profiling ratios when
set UMD Pstate.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-19 14:17:53 -05:00
Rex Zhu
6390258a2f
drm/amd/pp: Add custom power profile mode support on Vega10
...
v2: delete uncessary blank line.
Add static const modifiers to an array
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-19 14:17:52 -05:00
Rex Zhu
59655cb6ab
drm/amd/pp: Add querying current gfx voltage for Vega10
...
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-19 14:17:50 -05:00
Rex Zhu
84877256f6
drm/amd/pp: Add querying current gfx voltage for CI/VI
...
Store the voltage regulator configuration,
so we can properly query the voltage.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-19 14:17:49 -05:00
Rex Zhu
039fdc94c1
drm/amd/pp: Add memory clock info display on Cz/St
...
show mclk info as in MHz on Cz/St as
0: 333Mhz *
1: 800Mhz
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-19 14:17:48 -05:00
Rex Zhu
4efe9b4794
drm/amd/pp: Refine code shorten variable name
...
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-19 14:17:16 -05:00
Rex Zhu
9bd2bae13d
drm/amd/pp: Add a helper to convert VID to voltage value
...
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-19 14:17:15 -05:00
Evan Quan
10cd19c877
drm/amd/powerplay: use ffs/fls instead of implementing our own
...
Signed-off-by: Evan Quan <evan.quan@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-19 14:17:09 -05:00
Evan Quan
31a47dcab8
drm/amd/powerplay: export the thermal ranges of Carrizo (V2)
...
V2: reuse the SMUThermal structure defined in pp_thermal.h
Signed-off-by: Evan Quan <evan.quan@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-19 14:17:09 -05:00
Evan Quan
4ba082572a
drm/amd/powerplay: export the thermal ranges of VI asics (V2)
...
V2: move the SMU7Thermal structure to newly created header file
Signed-off-by: Evan Quan <evan.quan@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-19 14:17:08 -05:00
Evan Quan
0a91ee0775
drm/amd/powerplay: export vega10 specific thermal ranges (V2)
...
V2: new header file to hold the common SMU7Thermal structure
Signed-off-by: Evan Quan <evan.quan@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-19 14:17:08 -05:00
Alex Deucher
77f208d91b
drm/amd/powerplay: export thermal range through temp sysfs
...
Populate the hwmon temp range as part of thermal controller setup.
Signed-off-by: Evan Quan <evan.quan@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-19 14:17:07 -05:00
Evan Quan
4ad9d4dd65
drm/amd/powerplay: correct PP_TemperatureRange member type since negative values are part of the valid range
...
Signed-off-by: Evan Quan <evan.quan@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-19 14:17:05 -05:00
Evan Quan
39199b803b
drm/amd/powerplay: removed hwmgr_handle_task unused parameter and given a better name for
...
other parameter
Signed-off-by: Evan Quan <evan.quan@amd.com >
Acked-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-19 14:17:05 -05:00
Evan Quan
8053e976cf
drm/amd/powerplay: remove unused parameter of phm_start_thermal_controller (v2)
...
Unused.
v2: squash in warning fix (Harry)
Signed-off-by: Evan Quan <evan.quan@amd.com >
Acked-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-19 14:17:04 -05:00
Julia Lawall
1446413f21
drm/amd/powerplay: drop unneeded newline
...
PP_ASSERT_WITH_CODE prints a newline at the end of the message string,
so the message string does not need to include a newline explicitly.
Done using Coccinelle.
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-19 14:17:03 -05:00
Rex Zhu
ad8cec7df5
drm/amd/pp: Implement get_max_high_clocks for CI/VI
...
v2: add table length check.
DC component expect PP to give max engine clock and
memory clock through pp_get_display_mode_validation_clocks
on DGPU as well.
This patch can fix MultiGPU-Display blank
out with 1 IGPU-4k display and 2 DGPU-two 4K
displays.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-01-10 15:44:55 -05:00
Rex Zhu
923a50a686
drm/amd/pp: Implement force_dpm_level on Rv
...
user can change dpm level on Rv through sysfs
v3: add smu version check
v2: fix no return statement
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-20 11:59:40 -05:00
Rex Zhu
d100033b2a
drm/amd/pp: Move smu_version to common code
...
Move the smu_version to struct hwmgr, so it can be shared
by other asics.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-20 11:56:48 -05:00
Rex Zhu
8621bbbbd3
drm/amd/pp: delete repeated call of force_dpm_level
...
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-19 12:11:58 -05:00
Rex Zhu
582dd5da5c
drm/amd/pp: implement phm_reset_power_profile_state
...
mv related code out of force_dpm_level to
phm_reset_power_profile_state
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-19 12:11:57 -05:00
Rex Zhu
29411f05c6
drm/amd/pp: delete dead code of arbiter overdriver clk
...
for sclk/mclk, can be adjusted through sysfs.
for uvd/vce clk, will be adjusted case by case when
requested.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-19 12:11:57 -05:00
Rex Zhu
ebe0dce655
drm/amd/pp: reset dpm level when adjust power state
...
Acked-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-14 10:23:02 -05:00
Rex Zhu
7364d60882
drm/amd/pp: implement dpm_get_sclk/mclk for RV
...
RV implementation was missing these callbacks. Used
to fetch the clock values for other components.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Reviewed-by: Evan Quan <evan.quan@amd.com >
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-13 17:31:01 -05:00
Alex Deucher
9ce6aae12c
drm/amdgpu: add license to files where it was missing
...
These files were missing it before.
Acked-by: Harry Wentland <harry.wentland@amd.com >
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-07 11:51:25 -05:00
Alex Deucher
1a09120f83
drm/amdgpu: add license to Makefiles
...
Was missing license text.
Acked-by: Harry Wentland <harry.wentland@amd.com >
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-07 11:51:10 -05:00
Feifei Xu
6b5b5fea3b
drm/amd/include:cleanup raven1 thm header files.
...
Cleanup asic_reg/raven1/THM folder.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:26 -05:00
Feifei Xu
51199920a2
drm/amd/include:cleanup raven1 nbio header files.
...
Cleanup asic_reg/raven1/NBIO folder.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:25 -05:00
Feifei Xu
a146391bbb
drm/amd/include:cleanup raven1 mp header files.
...
Cleanup asic_reg/raven1/MP folder.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:25 -05:00
Feifei Xu
f0a58aa3f2
drm/amd/include:cleanup vega10 nbio header files.
...
Cleanup asic_reg/vega10/NBIO folder.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:21 -05:00
Feifei Xu
cde5c34f63
drm/amd/include:cleanup vega10 gc header files.
...
Cleanup asic_reg/vega10/GC folder.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:20 -05:00
Feifei Xu
a629bf32df
drm/amd/include:cleanup vega10 thm header files.
...
Cleanup asic_reg/vega10/THM folder.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:18 -05:00
Feifei Xu
a6651c98c6
drm/amd/include:cleanup vega10 mp header files.
...
Cleanup asic_reg/vega10/MP folder, remove mp_9_0_default.h
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:17 -05:00
Ernst Sjöstrand
e9c227b253
drm/amd/powerplay: Fix missing newlines at end of file
...
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Ernst Sjöstrand <ernstp@gmail.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:47:59 -05:00
Ernst Sjöstrand
19fef71cd1
drm/amd/powerplay: Minor fixes in processpptables.c (v2)
...
Reported by smatch:
init_overdrive_limits() error: uninitialized symbol 'result'.
get_clock_voltage_dependency_table() warn: inconsistent indenting
v2: set result to 0 (Alex)
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Ernst Sjöstrand <ernstp@gmail.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:47:59 -05:00
Joe Perches
4f42a2dd3d
drm: amd: Fix line continuation formats
...
Line continuations with excess spacing causes unexpected output.
Miscellanea:
o Added missing '\n' to a few of the coalesced pr_<level> formats
Reviewed-by: Harry Wentland <harry.wentland@amd.com >
Signed-off-by: Joe Perches <joe@perches.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:47:57 -05:00