Commit Graph

16796 Commits

Author SHA1 Message Date
Hawking Zhang
db9ca58e16 drm/amdgpu: Add soc v1_0 ih client id table
To acommandate the specific ih client for soc v1_0

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-16 13:27:42 -05:00
Mukul Joshi
0c9ad47286 drm/amdgpu: Flush TLB on all XCCs on GFX 12.1
Currently, the driver code is flushing TLB on XCC 0 only.
Fix it by flushing on all XCCs within the partition.

Signed-off-by: Mukul Joshi <mukul.joshi@amd.com>
Reviewed-by: Felix Kuehling <felix.kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-16 13:27:39 -05:00
Saleemkhan Jamadar
1bc44dee26 drm/amdgpu: do not use amdgpu_bo_gpu_offset_no_check individually
This should not be used indiviually, use amdgpu_bo_gpu_offset
with bo reserved.

v3 - unpin bo in queue destroy (Christian)
v2 - pin bo so that offset returned won't change after unlock (Christian)

Signed-off-by: Saleemkhan Jamadar <saleemkhan083@gmail.com>
Suggested-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-16 13:27:13 -05:00
Lijo Lazar
81af7f1718 drm/amdgpu: Change set ip clock/power gating param
It's not required to use generic void *, change to struct amdgpu_device *.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-16 13:27:10 -05:00
Lijo Lazar
9498d18739 drm/amdgpu: Use helper to get ip block
Replace individual searches with the utility function get_ip_block

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-16 13:27:07 -05:00
Lijo Lazar
b6b06640a8 drm/amdgpu: Move ip block related functions
Move ip block related functions to amdgpu_ip.c. No functional change
intended.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-16 13:27:02 -05:00
Alex Deucher
20880a3fd5 drm/amdgpu: fix a job->pasid access race in gpu recovery
Avoid a possible UAF in GPU recovery due to a race between
the sched timeout callback and the tdr work queue.

The gpu recovery function calls drm_sched_stop() and
later drm_sched_start().  drm_sched_start() restarts
the tdr queue which will eventually free the job.  If
the tdr queue frees the job before time out callback
completes, the job will be freed and we'll get a UAF
when accessing the pasid.  Cache it early to avoid the
UAF.

Example KASAN trace:
[  493.058141] BUG: KASAN: slab-use-after-free in amdgpu_device_gpu_recover+0x968/0x990 [amdgpu]
[  493.067530] Read of size 4 at addr ffff88b0ce3f794c by task kworker/u128:1/323
[  493.074892]
[  493.076485] CPU: 9 UID: 0 PID: 323 Comm: kworker/u128:1 Tainted: G            E       6.16.0-1289896.2.zuul.bf4f11df81c1410bbe901c4373305a31 #1 PREEMPT(voluntary)
[  493.076493] Tainted: [E]=UNSIGNED_MODULE
[  493.076495] Hardware name: TYAN B8021G88V2HR-2T/S8021GM2NR-2T, BIOS V1.03.B10 04/01/2019
[  493.076500] Workqueue: amdgpu-reset-dev drm_sched_job_timedout [gpu_sched]
[  493.076512] Call Trace:
[  493.076515]  <TASK>
[  493.076518]  dump_stack_lvl+0x64/0x80
[  493.076529]  print_report+0xce/0x630
[  493.076536]  ? _raw_spin_lock_irqsave+0x86/0xd0
[  493.076541]  ? __pfx__raw_spin_lock_irqsave+0x10/0x10
[  493.076545]  ? amdgpu_device_gpu_recover+0x968/0x990 [amdgpu]
[  493.077253]  kasan_report+0xb8/0xf0
[  493.077258]  ? amdgpu_device_gpu_recover+0x968/0x990 [amdgpu]
[  493.077965]  amdgpu_device_gpu_recover+0x968/0x990 [amdgpu]
[  493.078672]  ? __pfx_amdgpu_device_gpu_recover+0x10/0x10 [amdgpu]
[  493.079378]  ? amdgpu_coredump+0x1fd/0x4c0 [amdgpu]
[  493.080111]  amdgpu_job_timedout+0x642/0x1400 [amdgpu]
[  493.080903]  ? pick_task_fair+0x24e/0x330
[  493.080910]  ? __pfx_amdgpu_job_timedout+0x10/0x10 [amdgpu]
[  493.081702]  ? _raw_spin_lock+0x75/0xc0
[  493.081708]  ? __pfx__raw_spin_lock+0x10/0x10
[  493.081712]  drm_sched_job_timedout+0x1b0/0x4b0 [gpu_sched]
[  493.081721]  ? __pfx__raw_spin_lock_irq+0x10/0x10
[  493.081725]  process_one_work+0x679/0xff0
[  493.081732]  worker_thread+0x6ce/0xfd0
[  493.081736]  ? __pfx_worker_thread+0x10/0x10
[  493.081739]  kthread+0x376/0x730
[  493.081744]  ? __pfx_kthread+0x10/0x10
[  493.081748]  ? __pfx__raw_spin_lock_irq+0x10/0x10
[  493.081751]  ? __pfx_kthread+0x10/0x10
[  493.081755]  ret_from_fork+0x247/0x330
[  493.081761]  ? __pfx_kthread+0x10/0x10
[  493.081764]  ret_from_fork_asm+0x1a/0x30
[  493.081771]  </TASK>

Fixes: a72002cb18 ("drm/amdgpu: Make use of drm_wedge_task_info")
Link: https://github.com/HansKristian-Work/vkd3d-proton/pull/2670
Cc: SRINIVASAN.SHANMUGAM@amd.com
Cc: vitaly.prosyak@amd.com
Cc: christian.koenig@amd.com
Suggested-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-16 13:26:31 -05:00
Mario Limonciello (AMD)
63387cbbb7 drm/amd: Resume the device in thaw() callback when console suspend is disabled
If console suspend has been disabled using `no_console_suspend` also
wake up during thaw() so that some messages can be seen for debugging.

Closes: https://gitlab.freedesktop.org/drm/amd/-/work_items/4191
Signed-off-by: Mario Limonciello (AMD) <superm1@kernel.org>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-16 13:23:30 -05:00
Likun Gao
bf2951e967 drm/amdgpu: enable gpu tlb flush for gfxhub
Enable gpu tlb flush for gfxhub without check gfx.is_poweron
as gfx is power on by default for gfx v12_1 ASIC.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-16 13:23:14 -05:00
Le Ma
a1f83bd713 drm/amdgpu: flush tlb properly for GMC v12.1 in early phase
Flush tlb properly for GMC v12.1

Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-16 13:23:07 -05:00
Le Ma
a848986a38 drm/amdgpu: Use AMDGPU_IS_GFXHUB to screen out GFXHUB for GMC v12.1
There're multiple gfxhubs on GMC v12.1

Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-16 13:23:04 -05:00
Likun Gao
bb562c955e drm/amdgpu: only copy ucode for enabled xcc
Only copy ucode for enabled xcc instead of copy for all 8 xcc
for rlc autoload on gfx v12_1 to save time.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-16 13:22:53 -05:00
chong li
12323f9588 drm/amdgpu: fix issue when switch NPS1 to NPSX
fix the function execution sequence after removing
kgd2kfd_init_zone_device out of gpu full access region.

Fixes: c71980a3fc ("drm/amdgpu: reduce the full gpu access time in amdgpu_device_init.")
Signed-off-by: chong li <chongli2@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-16 13:21:33 -05:00
Hawking Zhang
f24e96d69f drm/amdgpu: Set xcp id for mes ring
Set xcp id for mes ring

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:39:33 -05:00
Hawking Zhang
9987a6f34e drm/amdgpu: Init partition_mode and xcc_mask for GFX_IMU_PARTITION_SWITCH
Set partition_mode and physical xcc mask fields in
GFX_IMU_PARTITION_SWITCH register

v2: cleanup (Alex)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:39:29 -05:00
Hawking Zhang
e2a6a4e6d4 drm/amdgpu: Initialize vram_info for gmc v12_1
Initialize vram_info for gmc v12_1

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:39:27 -05:00
Hawking Zhang
bb418f99e6 drm/amdgpu: Init compute partition mode for gfx v12_1
Init compute partition mode for gfx v12_1

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:39:25 -05:00
Hawking Zhang
c58d8a6620 drm/amdgpu: Initialize memory ranges for gmc v12_1
Initialize memory ranges for gmc v12_1

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:39:22 -05:00
Hawking Zhang
51b9bb61e5 drm/amdgpu: Initialize memory partition callbacks for gmc v12_1
Initialize memory partition callbacks for gmv v12_1

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:39:19 -05:00
Likun Gao
7e40fe89dd drm/amdgpu: support rlc autoload for muti-xcc
Support rlc autload for muti-xcc on gfx v12_1.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:39:16 -05:00
Hawking Zhang
ef7d4a6a49 drm/amdgpu: Enable atomics for all the available xcc
Apply TCP_UTCL0_CNTL1 settings to all the available
xcc

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:39:12 -05:00
Mukul Joshi
3235a5b723 drm/amdgpu: Update MES VM_CNTX_CNTL for XNACK off for GFX 12.1
Currently, we do not turn off retry faults in VM_CONTEXT_CNTL value
when passing it to MES if XNACK is off. This creates a situation where
XNACK is disabled in SQ but enabled in UTCL2, which is not recommended.
As a result, turn off/on retry faults in both SQ and UTCL2 when passing
vm_context_cntl value to MES if XNACK is disabled/enabled.

Suggested-by: Jay Cornwall <jay.cornwall@amd.com>
Signed-off-by: Mukul Joshi <mukul.joshi@amd.com>
Reviewed-by: Philip Yang <Philip.Yang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:39:09 -05:00
Mukul Joshi
cc52af1a96 drm/amdkfd: Enable per-process XNACK for GFX 12.1.0
GFX 12.1.0 will support enabling/disabling XNACK on a per-
process basis. This change enables the per process XNACK feature.

Signed-off-by: Mukul Joshi <mukul.joshi@amd.com>
Reviewed-by: Philip Yang <Philip.Yang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:39:06 -05:00
Mukul Joshi
6f894c9249 drm/amdgpu: Enable retry faults for GFX 12.1
Enable retry faults in both GCVM/MMVM Context1 Control
and L2_PROTECTION_FAULT_CNTL2 registers for GFX 12.1.

Signed-off-by: Mukul Joshi <mukul.joshi@amd.com>
Reviewed-by: Philip Yang <Philip.Yang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:39:03 -05:00
Mukul Joshi
b79040d113 drm/amdgpu: Add IH node-id to XCC mapping
Add a generic function to map IH node-id to XCC instance.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Mukul Joshi <mukul.joshi@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:39:01 -05:00
Mukul Joshi
4c5f7d7388 drm/amdgpu: Add interrupt handler for GFX 12.1.0
Add a separate interrupt handler for handling interrupts,
both retry and no-retry, for GFX 12.1.0.

Signed-off-by: Mukul Joshi <mukul.joshi@amd.com>
Reviewed-by: Philip Yang <Philip.Yang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:38:56 -05:00
Mukul Joshi
00e08fb2e7 drm/amdgpu: Add UTCL2 Retry fault interrupt for GFX 12.1
Add the UTCL2 retry fault interrupt for both GCVM and MMVM for GFX 12.1.

Signed-off-by: Mukul Joshi <mukul.joshi@amd.com>
Reviewed-by: Philip Yang <Philip.Yang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:38:30 -05:00
Alex Deucher
c28a114276 drm/amdgpu/sdma: add query for CSA size and alignment
Needed to query the CSA size and alignment for SDMA
user queues.

Reviewed-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:38:26 -05:00
chong li
f9f3240018 drm/amdgpu: fix mes packet params issue when flush hdp.
v4:
use func "amdgpu_gfx_get_hdp_flush_mask" to get ref_and_mask for
gfx9 through gfx12.

v3:
Unify the get_ref_and_mask function in amdgpu_gfx_funcs,
to support both GFX11 and earlier generations

v2:
place "get_ref_and_mask" in amdgpu_gfx_funcs instead of amdgpu_ring,
since this function only assigns the cp entry.

v1:
both gfx ring and mes ring use cp0 to flush hdp, cause conflict.

use function get_ref_and_mask to assign the cp entry.
reassign mes to use cp8 instead.

Signed-off-by: chong li <chongli2@amd.com>
Acked-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:38:21 -05:00
Alex Deucher
e26e4225ae drm/amdgpu/gfx: add eop size and alignment to shadow info
This is used by firmware for compute user queues.

Reviewed-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:38:15 -05:00
Likun Gao
d6e8148328 drm/amdgpu: update sdma configuration for soc v1_0
Update SDMA instances/masks according to xcc num for
multi-xcc models on soc v1.0.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:38:10 -05:00
Hawking Zhang
f9ed1d463e drm/amdgpu: Initialize xcp manager for soc v1_0
Initialize xcp manager for soc v1_0

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:38:07 -05:00
Hawking Zhang
a936896135 drm/amdgpu: Add soc_v1_0_xcp_funcs
Implement xcp mgr callbacks for soc v1_0

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:38:05 -05:00
Hawking Zhang
e90a43c0c2 drm/amdgpu: Export sdma_v7_1_xcp_funcs
To be used by soc v1_0 xcp manager

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:38:02 -05:00
Hawking Zhang
4fbc61018b drm/amdgpu: Export gfx_v12_1_xcp_func
To be used by soc v1_0 xcp manager

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:37:59 -05:00
Candice Li
2e133eda97 drm/amdgpu: Add vram_type to ras init_flags
Add vram_type to ras init_flags.

Signed-off-by: Candice Li <candice.li@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:37:56 -05:00
Hawking Zhang
84d8beaf11 drm/amdgpu: Add switch_compute_partition callback for imu v12_1
To enable switching compute partition mode

v2: cleanup (Alex)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:35:22 -05:00
Hawking Zhang
7ce7234189 drm/amdgpu: Implement gfx_v12_1_get_xccs_per_xcp
Use gfx v12_1 callback to query the numbers of xccs
per xcp

v2: add todo (Alex)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Le Ma <le.ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:35:17 -05:00
Hawking Zhang
b7cb3669b6 drm/amdgpu: Remove redundant check for async_gfx_ring
Remove the redundant check for async_gfx_ring,
as it is not required for gfx v12_1

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:35:11 -05:00
Likun Gao
d0b6c5f226 drm/amdgpu: disable graphics doorbell range for gfx v12_1
Disable doorbell range for graphics engine on gfx v12_1.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:35:07 -05:00
Likun Gao
77385a2dc1 drm/amdgpu: enable unmap doorbell handle for gfx v12_1
Enable unmapped doorbell handling for gfx v12_1.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:35:02 -05:00
Likun Gao
c90ed18114 drm/amdgpu: revision doorbel range for gfx v12_1
Revision doorbell range on muti-XCC mode for gfx v12_1.
Clean up doorbell range set for graphics engine.
V2: Remove doorbell range set from gfx_v12_1_xcc_kiq_init_register.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:34:54 -05:00
Jonathan Kim
cf356fe11d drm/amdkfd: disable shader message vgpr deallocation on gc 12.1
Shader messages to deallocate VGPRs prior to shader end can prevent
the trap handler from saving context, making debugging and core dumps
unreliable.

VGPR deallocations for performance gain is negligible.
GC 12.1 will NOP shader VGPR deallocation messages via HW
settings on driver boot.

Signed-off-by: Jonathan Kim <jonathan.kim@amd.com>
Acked-by: Harish Kasiviswanathan <harish.kasiviswanathan@amd.com>
Reviewed-by: Felix Kuehling <felix.kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:34:44 -05:00
Hawking Zhang
8e0187aec6 drm/amdgpu: Remove redundant pmfw backdoor loading
PMFW is integrated into ifwi for gfx 12_1 adapter,
making PMFW backdoor loading unnecessary.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:34:35 -05:00
Mario Limonciello (AMD)
d717e62e9b drm/amd: Fix unbind/rebind for VCN 4.0.5
Unbinding amdgpu has no problems, but binding it again leads to an
error of sysfs file already existing.  This is because it wasn't
actually cleaned up on unbind.  Add the missing cleanup step.

Fixes: 547aad32ed ("drm/amdgpu: add VCN4 ip block support")
Signed-off-by: Mario Limonciello (AMD) <superm1@kernel.org>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:32:51 -05:00
Srinivasan Shanmugam
495b190480 drm/amdgpu/acpi: Reduce amdgpu_acpi_detect stack usage
amdgpu_acpi_detect() calls some helper functions it calls have large
local structures.  When the compiler inlines these helpers, their local
data adds to the amdgpu_acpi_detect() stack frame.

Mark the helpers with noinline_for_stack:
- amdgpu_atif_verify_interface()
- amdgpu_atif_get_notification_params()
- amdgpu_atif_query_backlight_caps()
- amdgpu_atcs_verify_interface()
- amdgpu_acpi_enumerate_xcc()

This keeps the large temporary objects inside the helper’s own stack
frame instead of being inlined into the caller, preventing the caller
from growing beyond the stack limit.

Fixes the below with gcc W=1:
drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c:1403:6: warning: stack frame size (1688) exceeds limit (1024) in 'amdgpu_acpi_detect' [-Wframe-larger-than]

Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:32:39 -05:00
Pierre-Eric Pelloux-Prayer
35bb80e683 drm/amdgpu: pass the entity to use to ttm public functions
This way the caller can select the one it wants to use.

Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Acked-by: Felix Kuehling <felix.kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08 14:31:27 -05:00
Pierre-Eric Pelloux-Prayer
e95b41846d drm/amdgpu: pass the entity to use to amdgpu_ttm_map_buffer
This way the caller can select the one it wants to use.

Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08 14:31:23 -05:00
Pierre-Eric Pelloux-Prayer
bc0515ece3 drm/amdgpu: fix error handling in amdgpu_copy_buffer
drm_sched_job_add_resv_dependencies can fail in amdgpu_ttm_prepare_job.
In this case we need to use amdgpu_job_free to release memory.

---
v4: moved job pointer clearing to a different patchset
---

Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08 14:31:15 -05:00
Pierre-Eric Pelloux-Prayer
582c65e854 drm/amdgpu: add amdgpu_ttm_job_submit helper
Deduplicate the IB padding code and will also be used
later to check locking.

Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08 14:30:59 -05:00