Update the calling chain from "amdgpu_smu.c -> ${asic}_ppt.c ->
smu_v11/12_0.c -> amdgpu_smu.c (smu_common_read_sensor())" to "
"amdgpu_smu.c -> ${asic}_ppt.c -> smu_v11/12_0.c". This can help
to maintain clear code layers. More similar changes will be coming.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
As IO operations(access to SMU internals) and possible sleep are
involved in throttling logging. Workqueue can handle them well.
Otherwise we may hit "scheduling while atomic" error.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Nirmoy Das <nirmoy.das@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Those common operations(for all ASICs) are placed first and followed
by ASIC specific ones. While the display related are placed at the last.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Since smu_smc_table_hw_init() is needed for both .hw_init and .resume.
By doing this, we can drop unnecessary operations on resume.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
For Sienna_Cichlid, PMFW will handle the features disablement on BACO in. No
need to have driver stepped in.
V2: limit this for baco really
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Add support for unique_id and serial_number, as these are now
the same value, and will be for future ASICs as well.
v2: Explicitly create unique_id only for VG10/20/ARC
v3: Change set_unique_id to get_unique_id for clarity
Signed-off-by: Kent Russell <kent.russell@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Thermal control is performed by PMFW. What handled in driver is
just whether or not to enable the alert(to driver).
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
smu_i2c_eeprom_init may be invoked twice or more
under sroiv mode, while we don't want to add check
if (!amdgpu_sriov_vf) before we invoke smu_i2c_eeprom_init/fini
each time, so we check if i2c adapter is already added
before we invoke i2c_add_adapter
Signed-off-by: Wenhui Sheng <Wenhui.Sheng@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Since on early phase of bringup, the SMU IP may be not enabled or
supported. Without this, we may hit null pointer dereference on
accessing smu->adev.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Yong Zhao <Yong.Zhao@amd.com>
Tested-by: Yong Zhao <Yong.Zhao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
When smu_i2c_eeprom_init is called on the smu resuming process
under sroiv mode, there will be a call trace:
[ 436.377690] dump_stack+0x63/0x85
[ 436.377695] kobject_init+0x77/0x90
[ 436.377704] device_initialize+0x28/0x110
[ 436.377708] device_register+0x12/0x20
[ 436.377756] i2c_register_adapter+0xeb/0x400
[ 436.377763] i2c_add_adapter+0x5a/0x80
[ 436.377951] arcturus_i2c_eeprom_control_init+0x60/0x80 [amdgpu]
[ 436.378123] smu_resume+0xcc/0x110 [amdgpu]
[ 436.378247] amdgpu_device_gpu_recover+0xfb1/0xfc0 [amdgpu]
[ 436.378401] amdgpu_job_timedout+0xf2/0x150 [amdgpu]
[ 436.378414] drm_sched_job_timedout+0x70/0xc0 [amd_sched]
[ 436.378420] ? drm_sched_job_timedout+0x70/0xc0 [amd_sched]
[ 436.378430] process_one_work+0x1fd/0x3f0
[ 436.378438] worker_thread+0x34/0x410
[ 436.378444] kthread+0x121/0x140
[ 436.378451] ? process_one_work+0x3f0/0x3f0
[ 436.378456] ? kthread_create_worker_on_cpu+0x70/0x70
[ 436.378464] ret_from_fork+0x35/0x40
This is because smu_i2c_eeprom is not released on gpu recovering.
Actually, smu_i2c_eeprom_init/fini are only needed under bare
mental mode.
Signed-off-by: Hua Zhang <hua.zhang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
by default, vega20 will use legacy powerplay driver.
in order to maintain the code conveniently in the future,
remove the support of vega20 from swsmu.
Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
the vega20 asic uses legacy powerplay driver by default.
1. cleanup is_support_sw_smu_xgmi() function.
(only use for vega20 xgmi pstate check)
2. by default, the vega20 set xgmi pstate by legacy powerplay routine.
Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
