Commit Graph

15 Commits

Author SHA1 Message Date
Johan Hovold
74eac50391 dt-bindings: PCI: qcom: Allow 'dma-coherent' property
Devices on some PCIe buses may be cache coherent and must be marked as
such in the devicetree to avoid data corruption.

This is specifically needed on recent Qualcomm platforms like SC8280XP.

Link: https://lore.kernel.org/r/20221205094530.12883-1-johan+linaro@kernel.org
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
2022-12-06 13:18:29 +01:00
Johan Hovold
3a936b2a5a dt-bindings: PCI: qcom: Add SC8280XP/SA8540P interconnects
Add the missing SC8280XP/SA8540P "pcie-mem" and "cpu-pcie" interconnect
paths to the bindings.

Link: https://lore.kernel.org/r/20221102090705.23634-2-johan+linaro@kernel.org
Fixes: 76d777ae04 ("dt-bindings: PCI: qcom: Add SC8280XP to binding")
Fixes: 76c4207f40 ("dt-bindings: PCI: qcom: Add SA8540P to binding")
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Manivannan Sadhasivam <mani@kernel.org>
2022-11-11 12:04:22 +01:00
Bjorn Helgaas
e302bafff6 Merge branch 'pci/qcom'
- List platforms that use a single MSI host interrupt in qcom DT (Johan
  Hovold)

- Add SC8280XP, SA8540P support to qcom DT binding and driver(Johan Hovold)

- Make all optional clocks truly optional in the driver (Johan Hovold)

- Rename per-IP structs to reflect the IP version (Johan Hovold)

- Sort device ID match table by compatible string (Johan Hovold)

- Add MODULE_DEVICE_TABLE to enable module autoloading (Dmitry Baryshkov)

- Drop the unused .post_deinit() callback (Johan Hovold)

- Rely on DT for clock information instead of hard-coding it in the driver
  (Manivannan Sadhasivam)

- Disable IRQs when removing driver to avoid spurious IRQs later
  (Manivannan Sadhasivam)

- Expose link transition counts via debugfs to help debug issues with
  low-power states (Manivannan Sadhasivam)

- Gate Master AXI clock to the MHI bus while in L1 substates to save power
  (Manivannan Sadhasivam)

- Disable Master AXI clock to save power when there is no traffic on PCIe
  (Manivannan Sadhasivam)

- Make the "PERST separation" debug feature optional in the DT and the
  driver (Manivannan Sadhasivam)

- Define clocks to be per-platform in DT to prepare for future SoCs
  (Manivannan Sadhasivam)

- Add SM8450 SoC support (Manivannan Sadhasivam)

- Check for platform_get_resource_byname() to avoid a NULL pointer
  dereference (Yang Yingliang)

* pci/qcom:
  PCI: qcom-ep: Check platform_get_resource_byname() return value
  PCI: qcom-ep: Add support for SM8450 SoC
  dt-bindings: PCI: qcom-ep: Add support for SM8450 SoC
  dt-bindings: PCI: qcom-ep: Define clocks per platform
  PCI: qcom-ep: Make PERST separation optional
  dt-bindings: PCI: qcom-ep: Make PERST separation optional
  PCI: qcom-ep: Disable Master AXI Clock when there is no PCIe traffic
  PCI: qcom-ep: Gate Master AXI clock to MHI bus during L1SS
  PCI: qcom-ep: Expose link transition counts via debugfs
  PCI: qcom-ep: Disable IRQs during driver remove
  PCI: qcom-ep: Make use of the cached dev pointer
  PCI: qcom-ep: Rely on the clocks supplied by devicetree
  PCI: qcom-ep: Add kernel-doc for qcom_pcie_ep structure
  PCI: qcom: Rename host-init error label
  PCI: qcom: Drop unused post_deinit callback
  PCI: qcom-ep: Add MODULE_DEVICE_TABLE
  PCI: qcom: Sort device-id table
  PCI: qcom: Clean up IP configurations
  PCI: qcom: Make all optional clocks optional
  PCI: qcom: Add support for SA8540P
  PCI: qcom: Add support for SC8280XP
  dt-bindings: PCI: qcom: Add SA8540P to binding
  dt-bindings: PCI: qcom: Add SC8280XP to binding
  dt-bindings: PCI: qcom: Enumerate platforms with single msi interrupt
2022-10-05 17:32:57 -05:00
Krishna chaitanya chundru
1abbe04a1b dt-bindings: pci: QCOM Add missing sc7280 aggre0, aggre1 clocks
Add missing aggre0 and aggre1 clocks.

Link: https://lore.kernel.org/r/1662626776-19636-3-git-send-email-quic_krichai@quicinc.com
Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-09-27 11:21:24 +02:00
Johan Hovold
76c4207f40 dt-bindings: PCI: qcom: Add SA8540P to binding
SA8540P is a new platform related to SC8280XP but which uses a single
host interrupt for MSI routing.

Link: https://lore.kernel.org/r/20220714071348.6792-4-johan+linaro@kernel.org
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Reviewed-by: Brian Masney <bmasney@redhat.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
2022-08-23 09:24:52 +02:00
Johan Hovold
76d777ae04 dt-bindings: PCI: qcom: Add SC8280XP to binding
Add the SC8280XP platform to the binding.

SC8280XP use four host interrupts for MSI routing so remove the obsolete
comment referring to newer chipsets supporting one or eight interrupts
(e.g. for backwards compatibility).

Link: https://lore.kernel.org/r/20220714071348.6792-3-johan+linaro@kernel.org
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
2022-08-23 09:24:40 +02:00
Johan Hovold
6611656736 dt-bindings: PCI: qcom: Enumerate platforms with single msi interrupt
Explicitly enumerate the older platforms that have a single msi host
interrupt. This allows for adding further platforms with, for example,
four msi interrupts without resorting to nested conditionals.

Drop the redundant comment about older chipsets instead of moving it.

Link: https://lore.kernel.org/r/20220714071348.6792-2-johan+linaro@kernel.org
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
2022-08-23 09:22:32 +02:00
Bjorn Helgaas
9195e6dd9b Merge branch 'pci/ctrl/qcom'
- Add PHY clock source implementation (Dmitry Baryshkov)

- Use new clk_regmap_phy_mux_ops for gcc-sm8450 and gcc-sc7280 PCIe pipe
  clocks (Dmitry Baryshkov)

- Set up rev 2.1.0 PARF_PHY before enabling clocks (Christian Marangi)

- Power on PHY before accessing IPQ8074 DBI registers to avoid boot hangs
  (Robert Marko)

- Power on PHY before accessing DBI registers on all variants for
  consistency (Robert Marko)

- Remove unnecessary pipe_clk handling since this is done in PHY drivers
  (Dmitry Baryshkov)

- Drop manual pipe_clk_src handling (Dmitry Baryshkov)

- Move GEN3_RELATED DBI definitions to common dwc header (Baruch Siach)

- Define slot capabilities using generic PCI_EXP_SLTCAP_* macros (Baruch
  Siach)

- Add IPQ60xx support (Selvam Sathappan Periakaruppan)

- Fix DT description typo (Baruch Siach)

- Fix DT "compatibles" typo (Johan Hovold)

- Allow ASPM L1 and substates for 2.7.0 (Krishna chaitanya chundru)

* pci/ctrl/qcom:
  PCI: qcom: Allow ASPM L1 and substates for 2.7.0
  dt-bindings: PCI: qcom: Fix reset conditional
  dt-bindings: PCI: qcom: Fix description typo
  PCI: qcom: Add IPQ60xx support
  PCI: qcom: Define slot capabilities using PCI_EXP_SLTCAP_*
  PCI: dwc: Move GEN3_RELATED DBI definitions to common header
  PCI: qcom: Drop manual pipe_clk_src handling
  PCI: qcom: Remove unnecessary pipe_clk handling
  PCI: qcom: Power on PHY before DBI register accesses
  PCI: qcom: Power on PHY before IPQ8074 DBI register accesses
  PCI: qcom: Set up rev 2.1.0 PARF_PHY before enabling clocks
  clk: qcom: gcc-sc7280: use new clk_regmap_phy_mux_ops for PCIe pipe clocks
  clk: qcom: gcc-sm8450: use new clk_regmap_phy_mux_ops for PCIe pipe clocks
  clk: qcom: regmap: add PHY clock source implementation
2022-08-04 11:41:58 -05:00
Dmitry Baryshkov
91a773f998 dt-bindings: PCI: qcom: Support additional MSI vectors
On Qualcomm platforms each group of 32 MSI vectors is routed to the
separate GIC interrupt. Document mapping of additional interrupts.

Link: https://lore.kernel.org/r/20220707134733.2436629-6-dmitry.baryshkov@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
2022-08-01 15:15:33 -05:00
Johan Hovold
839fbdee4c dt-bindings: PCI: qcom: Fix reset conditional
Fix the reset conditional which always evaluated to true due to a
misspelled property name ("compatibles" in plural).

Fixes: 6700a9b00f ("dt-bindings: PCI: qcom: Do not require resets on msm8996 platforms")
Link: https://lore.kernel.org/r/20220629141000.18111-2-johan+linaro@kernel.org
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-07-15 15:30:57 -05:00
Baruch Siach
5b05eab584 dt-bindings: PCI: qcom: Fix description typo
Fix "based" typo in description.

Link: https://lore.kernel.org/r/e08b53be6cdf8d94a5a002d5b74c8a884b2ff3c6.1655100158.git.baruch@tkos.co.il
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2022-07-15 15:30:57 -05:00
Dmitry Baryshkov
3f467d122f dt-bindings: PCI: qcom: Add schema for sc7280 chipset
Add support for sc7280-specific clock and reset definitions.

Link: https://lore.kernel.org/r/20220506152107.1527552-5-dmitry.baryshkov@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
2022-05-24 16:41:55 -05:00
Dmitry Baryshkov
c6523c4a30 dt-bindings: PCI: qcom: Specify reg-names explicitly
Instead of specifying the enum of possible reg-names, specify them
explicitly. This allows us to specify which chipsets need the "atu"
regions and which do not. Also it clearly describes which platforms
enumerate PCIe cores using the dbi region and which use parf region for
that.

Link: https://lore.kernel.org/r/20220506152107.1527552-4-dmitry.baryshkov@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
2022-05-24 16:41:38 -05:00
Dmitry Baryshkov
6700a9b00f dt-bindings: PCI: qcom: Do not require resets on msm8996 platforms
On MSM8996/APQ8096 platforms the PCIe controller doesn't have any
resets. So move the requirement stanza under the corresponding if
condition.

Link: https://lore.kernel.org/r/20220506152107.1527552-3-dmitry.baryshkov@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
2022-05-24 16:41:10 -05:00
Dmitry Baryshkov
075a9d5593 dt-bindings: PCI: qcom: Convert to YAML
Changes to the schema:
 - Fixed the ordering of clock-names/reset-names according to
   the dtsi files.
 - Mark vdda-supply as required only for apq/ipq8064 (as it was marked
   as generally required in the txt file).

Changes to examples:
 - Inline clock and reset numbers rather than including dt-bindings
   files because of conflicts between the headers
 - Split ranges and reg properties to follow current practice
 - Change -gpio to -gpios
 - Update IRQ flags to LEVEL_HIGH rater than NONE
 - Removed extra "snps,dw-pcie" compatibility.

Note: while it was not clearly described in text schema, the majority of
Qualcomm platforms follow the snps,dw-pcie schema and use two
compatibility strings in the DT files: platform-specific one and a
fallback to the generic snps,dw-pcie one. However the platform itself is
not compatible with the snps,dw-pcie interface, so we are going to
remove it.

Link: https://lore.kernel.org/r/20220506152107.1527552-2-dmitry.baryshkov@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
2022-05-24 16:41:10 -05:00