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2 Commits

Author SHA1 Message Date
Tudor Ambarus
77850bda36 spi: atmel,quadspi: Define sama7g5 QSPI 
sama7g5 embedds 2 instances of the QSPI controller:
1/ One Octal Serial Peripheral Interface (QSPI0) Supporting up to
   200 MHz DDR. Octal, TwinQuad, HyperFlash and OctaFlash Protocols
   Supported
2/ One Quad Serial Peripheral Interface (QSPI1) Supporting Up to
   90 MHz DDR/133 MHz SDR

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211209122939.339810-3-tudor.ambarus@microchip.com
Signed-off-by: Mark Brown <broonie@kernel.org>
 2021-12-15 22:16:55 +00:00
Tudor Ambarus
001a41d2a7 spi: atmel,quadspi: Convert to json-schema 
Convert the Atmel QuadSPI controller Device Tree binding documentation
to json-schema.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211209122939.339810-2-tudor.ambarus@microchip.com
Signed-off-by: Mark Brown <broonie@kernel.org>
 2021-12-15 22:16:54 +00:00