Commit Graph

64 Commits

Author SHA1 Message Date
Geert Uytterhoeven
4227976528 ARM: dts: renesas: Fix USB PHY device and child node names
make dtbs_check:

    usb-phy@e6590100: '#phy-cells' is a required property
	    From schema: dtschema/schemas/phy/phy-provider.yaml

The R-Car Gen2 USB PHY device nodes do not represent USB PHYs
theirselves, and thus do not have "#phy-cells" properties.  Fix the
warning by renaming them from "usb-phy" to "usb-phy-controller".
Rename their child nodes from "usb-channel" to "usb-phy", as these do
represent USB PHYs.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/6442b4042e26537abc8632c4772f8201685f1f1f.1663165098.git.geert+renesas@glider.be
2022-09-19 13:53:47 +02:00
Wolfram Sang
cb97d48555 ARM: dts: rzg1: Add interrupt properties to watchdog nodes
Driver doesn't use it yet, but let's describe the HW properly.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220322095512.4707-3-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-13 13:43:03 +02:00
Geert Uytterhoeven
a499e40a39 ARM: dts: renesas: Move enable-method to CPU nodes
According to Documentation/devicetree/bindings/arm/cpus.yaml, the
"enable-method" property should be a property of the individual CPU
nodes, and not of the parent "cpus" container node.
However, on R-Car Gen2 and RZ/G1 SoCs, the property is tied to the
"cpus" node instead.

Secondary CPU bringup and CPU hot (un)plug work regardless, as
arm_dt_init_cpu_maps() falls back to looking in the "cpus" node.

The cpuidle code does not have such a fallback, so it does not detect
the enable-method.  Note that cpuidle does not support the
"renesas,apmu" enable-method yet, so for now this does not make any
difference.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/35fcfedf9de9269185c48ca5a6dfcba7cdd3484b.1621427319.git.geert+renesas@glider.be
2021-05-25 10:02:59 +02:00
Adam Ford
ab2711b3af ARM: dts: renesas: Add fck to etheravb-rcar-gen2 clock-names list
The bindings have been updated to support two clocks.
Add a clock-names list in the device tree with fck in it.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/20210224115146.9131-2-aford173@gmail.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-05-25 09:55:52 +02:00
Geert Uytterhoeven
e0f0c7066f ARM: dts: renesas: Group tuples in APMU cpus properties
To improve human readability and enable automatic validation, the tuples
in "cpus" properties in device nodes for Advanced Power Management Units
for AP-System Core (APMU) should be grouped using angle brackets.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20210204130517.1647073-2-geert+renesas@glider.be
2021-03-08 10:22:38 +01:00
Geert Uytterhoeven
d9fd7ff595 ARM: dts: renesas: Fix pin controller node names
According to Devicetree Specification v0.2 and later, Section "Generic
Names Recommendation", the node name for a pin controller device node
should be "pinctrl".

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200821112351.5518-1-geert+renesas@glider.be
2020-09-11 09:41:20 +02:00
Yoshihiro Shimoda
d8293670ae ARM: dts: renesas: Fix SD Card/eMMC interface device node names
Fix the device node names as "mmc@".

Fixes: 6647469792 ("ARM: dts: r7s72100: add sdhi to device tree")
Fixes: a49f76cdda ("ARM: dts: r7s9210: Add SDHI support")
Fixes: 43304a5f51 ("ARM: shmobile: r8a73a4: tidyup DT node naming")
Fixes: 7d907894bf ("ARM: shmobile: r8a7740: tidyup DT node naming")
Fixes: 3ab2ea5fd1 ("ARM: dts: r8a7742: Add SDHI nodes")
Fixes: 63ce8a617b ("ARM: dts: r8a7743: Add SDHI controllers")
Fixes: b591e323b2 ("ARM: dts: r8a7744: Add SDHI nodes")
Fixes: d83010f87a ("ARM: dts: r8a7744: Initial SoC device tree")
Fixes: 7079131ef9 ("ARM: dts: r8a7745: Add SDHI controllers")
Fixes: 0485da7880 ("ARM: dts: r8a77470: Add SDHI1 support")
Fixes: 15aa5a95e8 ("ARM: dts: r8a77470: Add SDHI0 support")
Fixes: f068cc8160 ("ARM: dts: r8a77470: Add SDHI2 support")
Fixes: 14e1d9147d ("ARM: shmobile: r8a7778: tidyup DT node naming")
Fixes: 2624705ceb ("ARM: shmobile: r8a7779: tidyup DT node naming")
Fixes: b718aa4483 ("ARM: shmobile: r8a7790: tidyup DT node naming")
Fixes: b7ed8a0dd4 ("ARM: shmobile: Add SDHI devices to r8a7791 DTSI")
Fixes: ce01b14ecf ("ARM: dts: r8a7792: add SDHI support")
Fixes: fc9ee228f5 ("ARM: dts: r8a7793: Add SDHI controllers")
Fixes: b8e8ea127d ("ARM: shmobile: r8a7794: add SDHI DT support")
Fixes: 33f6be3bf6 ("ARM: shmobile: sh73a0: tidyup DT node naming")
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/1594382936-14114-1-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-07-17 10:58:23 +02:00
Yoshihiro Shimoda
ae990a1de0 ARM: dts: renesas: Fix IOMMU device node names
Fix IOMMU device node names as "iommu@".

Fixes: bbb44da0b5 ("ARM: dts: r8a7743: Add IPMMU DT nodes")
Fixes: 0dcba3de58 ("ARM: dts: r8a7745: Add IPMMU DT nodes")
Fixes: 350ae49b97 ("ARM: dts: r8a7744: Add IPMMU DT nodes")
Fixes: 70496727c0 ("ARM: shmobile: r8a7790: Add IPMMU DT nodes")
Fixes: f1951852ed ("ARM: shmobile: r8a7791: Add IPMMU DT nodes")
Fixes: 098cb3a601 ("ARM: shmobile: r8a7793: Add IPMMU nodes")
Fixes: 1cb2794f60 ("ARM: shmobile: r8a7794: Add IPMMU DT nodes")
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/1587461756-13317-1-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-04-27 12:01:52 +02:00
Geert Uytterhoeven
9e1232631d ARM: dts: rzg1: Add reset control properties for display
Add reset control properties to the devices node for the Display Units
on all supported RZ/G1 SoCs.  Note that on these SoCs, there is only a
single reset for all DU channels.

Join the clocks lines while at it, to increase uniformity.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/20200218133019.22299-3-geert+renesas@glider.be
2020-02-24 14:03:33 +01:00
Geert Uytterhoeven
6e0a7c403d ARM: dts: r8a7745: Convert to new DU DT bindings
The DU DT bindings have been updated to drop the reg-names property.
Update the r8a7745 device tree accordingly.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Link: https://lore.kernel.org/r/20200218132217.21454-1-geert+renesas@glider.be
2020-02-24 14:03:33 +01:00
Geert Uytterhoeven
3bb426d042 ARM: dts: rcar-gen2: Add missing mmio-sram bus properties
"#address-cells", "#size-cells", and "ranges" are required properties
for devices nodes compatible with "mmio-sram", leading to warnings when
running "make dtbs_check":

    $ make dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/sram/sram.yaml
    arch/arm/boot/dts/r8a7791-koelsch.dt.yaml: sram@e63a0000: '#address-cells' is a required property
    arch/arm/boot/dts/r8a7791-koelsch.dt.yaml: sram@e63a0000: '#size-cells' is a required property
    arch/arm/boot/dts/r8a7791-koelsch.dt.yaml: sram@e63a0000: 'ranges' is a required property
    ...

Fix this by adding the missing properties to the mmio-sram device nodes
in the DTS files for all affected R-Car Gen2 and RZ/G1 SoCs.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20191213162604.1890-1-geert+renesas@glider.be
2019-12-31 10:33:41 +01:00
Geert Uytterhoeven
505128865a ARM: dts: rcar-gen2: Fix PCI high address in interrupt-map-mask
"make dtbs_check" emits warnings like:

    pci@ee090000: interrupt-map-mask:0:0: 65280 is greater than the maximum of 63488
    pci@ee0b0000: interrupt-map-mask:0:0: 65280 is greater than the maximum of 63488
    pci@ee0d0000: interrupt-map-mask:0:0: 65280 is greater than the maximum of 63488

According to dt-schemas/schemas/pci/pci-bus.yaml, the PCI high address
cell value in the "interrupt-map-mask" property must lie in the range
0..0xf800.

Fix this by correcting the values from 0xff00 to 0xf800 in all affected
R-Car Gen2 and RZ/G1 DTS files.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20191213162459.1731-1-geert+renesas@glider.be
2019-12-31 10:33:41 +01:00
Geert Uytterhoeven
c2e952ef5a ARM: dts: renesas: Group tuples in interrupt properties
To improve human readability and enable automatic validation, the tuples
in the various properties containing interrupt specifiers should be
grouped.  While "make dtbs_check" does not impose this yet for the
"interrupts" property, it does for the "interrupt-map" property, leading
to warnings like:

    pci@ee090000: interrupt-map:0: [0, 0, 0, 1, 5, 0, 108, 4, 2048, 0, 0, 1, 5, 0, 108, 4, 4096, 0, 0, 2, 5, 0, 108, 4] is too long
    pci@ee0d0000: interrupt-map:0: [0, 0, 0, 1, 5, 0, 113, 4, 2048, 0, 0, 1, 5, 0, 113, 4, 4096, 0, 0, 2, 5, 0, 113, 4] is too long

Fix this by grouping the tuples of the "interrupts" and "interrupt-map"
properties using angle brackets.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20191213164115.3697-4-geert+renesas@glider.be
Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
2019-12-20 16:36:59 +01:00
Wolfram Sang
cdbfaf640a ARM: dts: convert to SPDX identifier for Renesas boards
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-07-23 13:33:03 +02:00
Geert Uytterhoeven
9562a6b1d0 ARM: dts: r8a7745: Add PMU device node
Enable support for the ARM Performance Monitor Units in the Cortex-A7
CPU cores on RZ/G1E by adding a device node for the PMU.

New Linux output:

    hw perfevents: enabled with armv7_cortex_a7 PMU driver, 5 counters available

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-05-14 16:40:45 +02:00
Fabrizio Castro
5f39290ff3 ARM: dts: r8a7745: Add watchdog support to SoC dtsi
This patch adds watchdog support to the r8a7745 SoC dtsi.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-04-25 08:51:09 +02:00
Fabrizio Castro
7270dedc84 ARM: dts: r8a7745: Adjust SMP routine size
This patch adjusts the definition of the SMP routine size according
to the latest changes made by commit:
"ARM: shmobile: Add watchdog support"

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-04-25 08:51:04 +02:00
Biju Das
76a2577d97 ARM: dts: r8a7745: Add VSP support
Add VSP support to SoC DT.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Chris Paterson <chris.paterson2@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-12 13:50:58 +01:00
Biju Das
0dcba3de58 ARM: dts: r8a7745: Add IPMMU DT nodes
Add the six IPMMU instances found in the r8a7745 to DT with a disabled
status.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Chris Paterson <chris.paterson2@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-12 13:50:58 +01:00
Simon Horman
28c07001db ARM: dts: r8a7745: sort subnodes of soc node
Sort the subnodes of the soc node to improve maintainability.
The sort key is the address on the bus with instances of the same
IP block grouped together and sorted alphabetically.

Minor whitespace and line-wrapping changes are also made
to match the formatting of R-Car Gen2 SoCs.

This patch should not introduce any functional change.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-02-12 13:50:58 +01:00
Biju Das
5b06201067 ARM: dts: r8a7745: Add missing clock for secondary CA7 CPU core
Add the missing clock to CA7 CPU1 node.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-12-22 09:24:00 +01:00
Biju Das
17d2e479d0 ARM: dts: r8a7745: Add sound support
Define the generic r8a7745(RZ/G1E) part of the sound device node.

This patch is based on the r8a7794 sound work by Sergei Shtylyov.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-12-21 12:21:40 +01:00
Biju Das
a14a05c2f3 ARM: dts: r8a7745: Add audio DMAC support
Instantiate the audio DMA controller on the r8a7745 device tree.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-12-21 12:21:17 +01:00
Biju Das
44da63157d ARM: dts: r8a7745: Add audio clocks
Describe the external audio clocks required by the sound driver.
Boards that provide audio clocks need to override the clock frequencies.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-12-21 12:20:49 +01:00
Simon Horman
7bee3795c8 ARM: dts: r8a7745: move timer node out of bus
The timer node does not have any register properties and thus shouldn't be
placed on the bus.

This problem is flagged by the compiler as follows:
$ make dtbs W=1
...
arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dtb: Warning (simple_bus_reg): Node /soc/timer missing or empty reg/ranges property
arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dtb: Warning (simple_bus_reg): Node /soc/timer missing or empty reg/ranges property
  DTC     arch/arm/boot/dts/r8a7745-sk-rzg1e.dtb
arch/arm/boot/dts/r8a7745-sk-rzg1e.dtb: Warning (simple_bus_reg): Node /soc/timer missing or empty reg/ranges property

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-12-20 10:30:56 +01:00
Simon Horman
d913ef1fae ARM: dts: r8a7745: sort root sub-nodes alphabetically
Sort root sub-nodes alphabetically to allow for easier maintenance
of this file.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-12-20 10:27:49 +01:00
Fabrizio Castro
9680c97b51 ARM: dts: r8a7745: Add CMT SoC specific support
Add CMT[01] support to SoC DT.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-12-20 10:14:59 +01:00
Fabrizio Castro
b9db514555 ARM: dts: r8a7745: Add TPU support
Add TPU support to SoC DT.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-12-20 10:12:00 +01:00
Fabrizio Castro
3711d0ede2 ARM: dts: r8a7745: Add PWM SoC support
Add the definitions for pwm[0123456] to the SoC .dtsi.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-12-20 10:11:32 +01:00
Fabrizio Castro
aaca1ff0db ARM: dts: r8a7745: Add APMU node and second CPU core
Add DT node for the Advanced Power Management Unit (APMU), add the
second CPU core, and use "renesas,apmu" as "enable-method".

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-12-07 09:48:13 +01:00
Fabrizio Castro
1a20f21899 ARM: dts: r8a7745: add VIN dt support
Add VIN[01] support to SoC dt. Also, add aliases.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-11-27 11:40:26 +01:00
Fabrizio Castro
85d3122659 ARM: dts: r8a7745: Add CAN[01] SoC support
Add the definitions for can0 and can1 to the SoC .dtsi.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-11-27 11:40:14 +01:00
Fabrizio Castro
5841b8b32b ARM: dts: r8a7745: Add DU support
Add du node to r8a7745 SoC DT. Boards that want to enable the DU
need to specify the output topology.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-11-27 11:40:11 +01:00
Simon Horman
35098dd2e3 ARM: dts: r8a7745: Use R-Car SDHI Gen2 fallback compat string
Use newly added R-Car SDHI Gen2 fallback compat string
in the DT of the r8a7745 SoC.

This should have no run-time effect as the driver matches against
the per-SoC compat string before considering the fallback compat string.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-11-27 11:39:59 +01:00
Fabrizio Castro
0ee0aff583 ARM: dts: r8a7745: Add IIC cores to dtsi
Add iic0 and iic1 nodes to SoC dtsi. Also, define aliases i2c6
and i2c7. Board specific DT files will enable the interfaces
if needed.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Chris Paterson <chris.paterson2@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-11-27 11:39:57 +01:00
Biju Das
d4595f0408 ARM: dts: r8a7745: Enable DMA for HSUSB
From: Biju Das <biju.das@bp.renesas.com>

This patch adds DMA properties to the HSUSB node.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-11-27 11:39:54 +01:00
Biju Das
fbdf17b307 ARM: dts: r8a7745: Add USB-DMAC device nodes
From: Biju Das <biju.das@bp.renesas.com>

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-11-27 11:39:53 +01:00
Biju Das
c5a541b81b ARM: dts: r8a7745: Add HS-USB device node
From: Biju Das <biju.das@bp.renesas.com>

Define the R8A7745 generic part of the HS-USB device node. It is up to the
board file to enable the device.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-11-27 11:39:52 +01:00
Simon Horman
d596026911 ARM: dts: r8a7745: Use R-Car Gen2 Ether fallback compat string
Use newly added R-Car Gen2 Ether fallback compat string
in the DT of the r8a7745 SoC.

This should have no run-time effect as the driver matches against
the per-SoC compat string before considering the fallback compat string.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-11-27 11:39:37 +01:00
Biju Das
c3e35873e3 ARM: dts: r8a7745: Link PCI USB devices to USB PHY
Describe the PCI USB devices that are behind the PCI bridges, adding
necessary links to the USB PHY device.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-12 12:14:38 +02:00
Biju Das
237173a4bb ARM: dts: r8a7745: Add USB PHY DT support
Define the r8a7745 generic part of the USB PHY device node.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-12 12:14:24 +02:00
Biju Das
ab290a3292 ARM: dts: r8a7745: Add internal PCI bridge nodes
Add device nodes for the r8a7745 internal PCI bridge devices.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-12 12:13:56 +02:00
Fabrizio Castro
e527649c32 ARM: dts: r8a7745: Add MSIOF[012] support
Add the DT nodes needed by MSIOF[012] interfaces to the SoC dtsi.
Also, define aliases for spi[123].

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-09-28 07:59:30 +02:00
Fabrizio Castro
2391d0269a ARM: dts: r8a7745: Add QSPI support
Add the DT node for the QSPI interface to the SoC dtsi.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-09-21 10:44:40 +02:00
Fabrizio Castro
7079131ef9 ARM: dts: r8a7745: Add SDHI controllers
Add the SDHI controllers to the r8a7745 device tree.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-09-19 11:20:19 +02:00
Biju Das
372b01369f ARM: dts: r8a7745: Add Ethernet AVB support
Add Ethernet AVB support for r8a7745 SoC.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-09-19 11:19:51 +02:00
Fabrizio Castro
933b16efb7 ARM: dts: r8a7745: Add MMC interface support
Add MMC interface support for r8a7745 SoC.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-09-19 11:19:29 +02:00
Fabrizio Castro
282fbf4066 ARM: dts: r8a7745: Add I2C DT support
Add I2C[0-5] devices to the r8a7745 device tree.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-09-19 11:19:27 +02:00
Biju Das
3163c03ec3 ARM: dts: r8a7745: Add GPIO support
Describe GPIO blocks in the R8A7745 device tree.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-09-19 11:19:22 +02:00
Sergei Shtylyov
95b94ed9ab ARM: dts: r8a7745: add PFC support
Define the generic R8A7745 part of the PFC device node.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-08-15 17:59:41 +02:00