Conor Dooley
d49166646e
riscv: dts: microchip: add a devicetree for aries' m100pfsevp
...
Add device trees for both configs used by the Aries Embedded
M100PFSEVP. The M100OFSEVP consists of a MPFS250T on a SOM,
featuring:
- 2GB DDR4 SDRAM dedicated to the HMS
- 512MB DDR4 SDRAM dedicated to the FPGA
- 32 MB SPI NOR Flash
- 4 GByte eMMC
and a carrier board with:
- 2x Gigabit Ethernet
- USB
- 2x UART
- 2x CAN
- TFT connector
- HSMC extension connector
- 3x PMOD extension connectors
- microSD-card slot
Link: https://www.aries-embedded.com/polarfire-soc-fpga-microsemi-m100pfs-som-mpfs025t-pcie-serdes
Link: https://www.aries-embedded.com/evaluation-kit/fpga/polarfire-microchip-soc-fpga-m100pfsevp-riscv-hsmc-pmod
Link: https://downloads.aries-embedded.de/products/M100PFS/Hardware/M100PFSEVP-Schematics.pdf
Co-developed-by: Wolfgang Grandegger <wg@aries-embedded.de >
Signed-off-by: Wolfgang Grandegger <wg@aries-embedded.de >
Signed-off-by: Conor Dooley <conor.dooley@microchip.com >
2022-09-27 18:53:58 +01:00
Vattipalli Praveen
978a17d1a6
riscv: dts: microchip: add sevkit device tree
...
Add a basic dts for the Microchip Smart Embedded Vision dev kit.
The SEV kit is an upcoming first party board, featuring an MPFS250T and:
- Dual Sony Camera Sensors (IMX334)
- IEEE 802.11 b/g/n 20MHz (1x1) Wi-Fi
- Bluetooth 5 Low Energy
- 4 GB DDR4 x64
- 2 GB LPDDR4 x32
- 1 GB SPI Flash
- 8 GB eMMC flash & SD card slot (multiplexed)
- HDMI2.0 Video Input/Output
- MIPI DSI Output
- MIPI CSI-2 Input
Link: https://onlinedocs.microchip.com/pr/GUID-404D3738-DC76-46BA-8683-6A77E837C2DD-en-US-1/index.html?GUID-065AEBEE-7B2C-4895-8579-B1D73D797F06
Signed-off-by: Vattipalli Praveen <praveen.kumar@microchip.com >
Signed-off-by: Conor Dooley <conor.dooley@microchip.com >
2022-09-27 18:53:58 +01:00
Conor Dooley
bc47b2217f
riscv: dts: microchip: add the sundance polarberry
...
Add a minimal device tree for the PolarFire SoC based Sundance
PolarBerry.
Reviewed-by: Heiko Stuebner <heiko@sntech.de >
Signed-off-by: Conor Dooley <conor.dooley@microchip.com >
Link: https://lore.kernel.org/r/20220509142610.128590-9-conor.dooley@microchip.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com >
2022-06-01 15:28:29 -07:00
Conor Dooley
da305fa8a9
riscv: dts: microchip: remove soc vendor from filenames
...
Having the SoC vendor both as the directory and in the filename adds
little. Remove microchip from the filenames so that the files will
resemble the other directories in riscv (and arm64). The new names
follow a soc-board.dts & soc{,-fabric}.dtsi pattern.
Reviewed-by: Heiko Stuebner <heiko@sntech.de >
Signed-off-by: Conor Dooley <conor.dooley@microchip.com >
Link: https://lore.kernel.org/r/20220509142610.128590-4-conor.dooley@microchip.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com >
2022-06-01 15:27:54 -07:00
Alexandre Ghiti
0ddd7eaffa
riscv: Fix BUILTIN_DTB for sifive and microchip soc
...
Fix BUILTIN_DTB config which resulted in a dtb that was actually not
built into the Linux image: in the same manner as Canaan soc does,
create an object file from the dtb file that will get linked into the
Linux image.
Signed-off-by: Alexandre Ghiti <alex@ghiti.fr >
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com >
2021-06-11 21:07:09 -07:00
Atish Patra
0fa6107eca
RISC-V: Initial DTS for Microchip ICICLE board
...
Add initial DTS for Microchip ICICLE board having only
essential devices (clocks, sdhci, ethernet, serial, etc).
The device tree is based on the U-Boot patch.
https://patchwork.ozlabs.org/project/uboot/patch/20201110103414.10142-6-padmarao.begari@microchip.com/
Signed-off-by: Atish Patra <atish.patra@wdc.com >
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com >
2021-04-26 08:31:31 -07:00
