bybrooklyn/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-04-30 20:42:33 -04:00
Code Issues Packages Projects Releases Wiki Activity
1,153,390 Commits 1 Branch 928 Tags
df875276d8c69b27e1ed242d3cee6bc23d3b7f43
Commit Graph

89320 Commits

Author SHA1 Message Date
Yifan Zha
5818eae501 drm/amdgpu: skip "Issue additional private vm invalidation to MMHUB" on SRIOV 
[Why]
vm_l2_bank_select_reserved_cid2 is a PF_only register
that cannot be programmed by VF. This feature is only
support HDP using GPUVM page tables to access FB memory
which should be disabled on SRIOV.

[How]
Disable the feature on VF.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Yifan Zha <Yifan.Zha@amd.com>
Signed-off-by: Horace Chen <horace.chen@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-09-01 15:11:40 -04:00
Yifan Zha
c1026c6f31 drm/amdgpu: Skip the program of MMMC_VM_AGP_* in SRIOV on MMHUB v3_0_0 
[Why]
VF should not program these registers, the value were defined in the host.

[How]
Skip writing them in SRIOV environment and program them on host side.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Yifan Zha <Yifan.Zha@amd.com>
Signed-off-by: Horace Chen <horace.chen@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-09-01 15:11:35 -04:00
Yifan Zha
425fede6e8 drm/amdgpu: Use PSP program IH_RB_CNTL registers under SRIOV 
[Why]
With L1 Policy applied, IH_RB_CNTL/RING cannot be accessed by VF.

[How]
Use PSP program IH_RB_CNTL in VF.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Yifan Zha <Yifan.Zha@amd.com>
Signed-off-by: Horace Chen <horace.chen@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-09-01 15:11:31 -04:00
Horace Chen
f8bd73213a drm/amdgpu: Support PSP 13.0.10 on SR-IOV 
Add support for PSP 13.0.10 for SR-IOV VF

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Horace Chen <horace.chen@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-09-01 15:11:26 -04:00
Horace Chen
dc5f3829a7 drm/amdgpu: sriov remove vcn_4_0 and jpeg_4_0 
SRIOV needs to initialize mmsch instead of multimedia engines
directly. So currently remove them for SR-IOV until the code and
firmwares are ready.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Horace Chen <horace.chen@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-09-01 15:11:18 -04:00
Horace Chen
d9d86d085f drm/amdgpu: refine virtualization psp fw skip check 
SR-IOV may need to load different firmwares for different ASIC inside
VF.
So create a new function in amdgpu_virt to check whether FW load needs
to be skipped.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Horace Chen <horace.chen@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-09-01 15:11:12 -04:00
Horace Chen
afb50906cf drm/amdgpu: enable WPTR_POLL_ENABLE for sriov on sdma_v6_0 
[Why]
Under SR-IOV, if VF is switched out then its doorbell will be disabled,
SDMA rely on WPTR_POLL to get doorbells which was sent during VF
switched-out time.

[How]
For SR-IOV, set SDMA WPTR_POLL_ENABLE to 1.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Horace Chen <horace.chen@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-09-01 15:11:06 -04:00
Horace Chen
ca4ba3394e drm/amdgpu: add a compute pipe reset for RS64 
[Why]
Under SR-IOV, we are not sure whether pipe status is
good or not when doing initialization. The compute engine
maybe fail to bringup if pipe status is bad.

[How]
Do an RS64 pipe reset for MEC before we do initialization.
Also apply to bare-metal.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Horace Chen <horace.chen@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-09-01 15:11:03 -04:00
Horace Chen
119dc6c50e drm/amdgpu: add sriov nbio callback structure 
[Why]
under SR-IOV, the nbio doorbell range will be defined by PF. So VF
nbio doorbell range registers will be blocked. It will cause violation
if VF access those registers directly.

[How]
create an nbio_v4_3_sriov_funcs for sriov nbio_v4_3 initialization to
skip the setting for the doorbell range registers.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Horace Chen <horace.chen@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-09-01 15:11:00 -04:00
Horace Chen
09872b1c24 drm/amdgpu: add CHIP_IP_DISCOVERY support for virtualization 
For further chips we will use CHIP_IP_DISCOVERY, so add this
support for virtualization

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Horace Chen <horace.chen@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-09-01 15:10:54 -04:00
Yifan Zhang
75efc459ea drm/amdgpu/mes: zero the sdma_hqd_mask of 2nd SDMA engine for SDMA 6.0.1 
there is only one SDMA engine in SDMA 6.0.1, the sdma_hqd_mask has to be
zeroed for the 2nd engine, otherwise MES scheduler will consider 2nd
engine exists and map/unmap SDMA queues to the non-existent engine.

Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: Tim Huang <Tim.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-09-01 15:10:35 -04:00
Alex Deucher
41ee1f18ef drm/amd/display: fix documentation for amdgpu_dm_update_freesync_caps() 
Document missing parameter.

Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Cc: Harry Wentland <harry.wentland@amd.com>
Fixes: 8889a13f99e5 ("drm/amd/display: Add some extra kernel doc to amdgpu_dm")
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-09-01 15:10:18 -04:00
Chengming Gui
68fb37bc2c drm/amd/amdgpu: skip ucode loading if ucode_size == 0 
Restrict the ucode loading check to avoid frontdoor loading error.

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-09-01 15:09:07 -04:00
Rodrigo Vivi
018a7bdbb0 drm/i915/slpc: Let's fix the PCODE min freq table setup for SLPC 
We need to inform PCODE of a desired ring frequencies so PCODE update
the memory frequencies to us. rps->min_freq and rps->max_freq are the
frequencies used in that request. However they were unset when SLPC was
enabled and PCODE never updated the memory freq.

v2 (as Suggested by Ashutosh): if SLPC is in use, let's pick the right
   frequencies from the get_ia_constants instead of the fake init of
   rps' min and max.

v3: don't forget the max <= min return

v4: Move all the freq conversion to intel_rps.c. And the max <= min
    check to where it belongs.

v5: (Ashutosh) Fix old comment s/50 HZ/50 MHz and add a doc explaining
    the "raw format"

Fixes: 7ba79a6715 ("drm/i915/guc/slpc: Gate Host RPS when SLPC is enabled")
Cc: <stable@vger.kernel.org> # v5.15+
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Tested-by: Sushma Venkatesh Reddy <sushma.venkatesh.reddy@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220831214538.143950-1-rodrigo.vivi@intel.com
 2022-09-01 14:24:41 -04:00
Akhil P Oommen
d6463fd4e9 drm/msm/a6xx: Handle GMU prepare-slumber hfi failure 
When prepare-slumber hfi fails, we should follow a6xx_gmu_force_off()
sequence.

Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/498401/
Link: https://lore.kernel.org/r/20220819015030.v5.7.I54815c7c36b80d4725cd054e536365250454452f@changeid
Signed-off-by: Rob Clark <robdclark@chromium.org>
 2022-09-01 08:06:55 -07:00
Michał Winiarski
169a32b768 drm/cmdline-parser: Use assert when needed 
Expecting to observe a specific value, when the function responsible for
setting the value has failed will lead to extra noise in test output.
Use assert when the situation calls for it.
Also - very small tidying up around the changed areas (whitespace).

v2: Leave out the locals (drm_connector is huge) (lkp)

Signed-off-by: Michał Winiarski <michal.winiarski@intel.com>
Reviewed-by: Maíra Canal <mairacanal@riseup.net>
Signed-off-by: Maíra Canal <mairacanal@riseup.net>
Link: https://patchwork.freedesktop.org/patch/msgid/20220817211236.252091-2-michal.winiarski@intel.com
 2022-09-01 08:45:24 -03:00
Michał Winiarski
0af02a0e52 drm/cmdline-parser: Merge negative tests 
Negative tests can be expressed as a single parameterized test case,
which highlights that we're following the same test logic (passing
invalid cmdline and expecting drm_mode_parse_command_line_for_connector
to fail), which improves readability.

v2: s/negative/invalid to be consistent with other testcases in DRM

Signed-off-by: Michał Winiarski <michal.winiarski@intel.com>
Reviewed-by: Maíra Canal <mairacanal@riseup.net>
Signed-off-by: Maíra Canal <mairacanal@riseup.net>
Link: https://patchwork.freedesktop.org/patch/msgid/20220817211236.252091-1-michal.winiarski@intel.com
 2022-09-01 08:45:24 -03:00
Tetsuo Handa
0538fa09bb gpu/drm/bridge/cadence: avoid flush_scheduled_work() usage 
Like commit c4f135d643 ("workqueue: Wrap flush_workqueue() using a
macro") says, flush_scheduled_work() is dangerous and will be forbidden.
We are on the way for removing all flush_scheduled_work() callers from
the kernel, and this patch is for removing flush_scheduled_work() call
 from cadence driver.

Since cdns-mhdp8546 driver uses 4 works

  mhdp->modeset_retry_work
  mhdp->hpd_work
  mhdp->hdcp.check_work
  mhdp->hdcp.prop_work

I assume that flush_scheduled_work() in cdns_mhdp_remove() needs to wait
for only these 4 works.

Since mhdp->modeset_retry_work already uses cancel_work_sync(), I assume
that flush_scheduled_work() needs to wait for only 3 works. But I came to
wonder whether mhdp->hdcp.check_work should be flushed or cancelled.

While flush_scheduled_work() waits for completion of works which were
already queued to system_wq, mhdp->hdcp.check_work is a delayed work.
That is, this work won't be queued to system_wq unless timeout expires.

Current code will wait for mhdp->hdcp.check_work only if timeout already
expired. If timeout is not expired yet, flush_scheduled_work() will fail
to cancel mhdp->hdcp.check_work, and cdns_mhdp_hdcp_check_work() which is
triggered by mhdp->hdcp.check_work will schedule hdcp->check_work, which
is too late for flush_scheduled_work() to wait for completion of
cdns_mhdp_hdcp_prop_work().

But since I couldn't get comments on how do we want to handle this race
window [1], this patch chose "do nothing" for mhdp->hdcp.check_work and
mhdp->hdcp.prop_work. That is, I assume that flush_scheduled_work() in
cdns_mhdp_remove() needs to wait for only mhdp->hpd_work work.

Link: https://lkml.kernel.org/r/943273cb-c2ec-24e3-5edb-64eacc6e2d30@I-love.SAKURA.ne.jp [1]
Signed-off-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/216591bc-28bb-0453-10bb-59e268dff540@I-love.SAKURA.ne.jp
 2022-09-01 13:43:46 +02:00
Mitul Golani
9aa320341e drm/i915/display: Fix warning callstack for imbalance wakeref 
While executing i915_selftest, wakeref imbalance warning is seen
with i915_selftest failure.

Currently when Driver is suspended, while doing unregister
it is taking wakeref without resuming the device.
This patch is resuming the device, if driver is already suspended
and doing unregister process.

Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220830085158.577157-1-mitulkumar.ajitkumar.golani@intel.com
 2022-09-01 13:47:38 +03:00
Robin Murphy
3740b08179 drm/panfrost: Update io-pgtable API 
Convert to io-pgtable's bulk {map,unmap}_pages() APIs, to help the old
single-page interfaces eventually go away. Unmapping heap BOs still
wants to be done a page at a time, but everything else can get the full
benefit of the more efficient interface.

Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Acked-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Steven Price <steven.price@arm.com>
Signed-off-by: Steven Price <steven.price@arm.com>
Link: https://patchwork.freedesktop.org/patch/msgid/daef7f8c134d989c55636a5790d8c0fcaca1bae3.1661205687.git.robin.murphy@arm.com
 2022-09-01 11:18:57 +01:00
Dave Airlie
a54569b1f9 Merge tag 'drm-intel-fixes-2022-08-26' of git://anongit.freedesktop.org/drm/drm-intel into drm-fixes 
- GVT fixes including fix for a CommetLake regression in mmio table
  and misc doc and typo fixes
- Fix CCS handling (Matt)
- Fix for guc requests after reset (Daniele)
- Display DSI related fixes (Jani)
- Display backlight related fixes (Arun, Jouni)

Signed-off-by: Dave Airlie <airlied@redhat.com>

From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/YwjCTDFm7clXPgEu@intel.com
 2022-09-01 16:15:05 +10:00
Chengming Gui
39c84b8e92 drm/amd/amdgpu: skip ucode loading if ucode_size == 0 
Restrict the ucode loading check to avoid frontdoor loading error.

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-08-31 17:02:20 -04:00
Rodrigo Vivi
ff4e0cafe8 drm/i915/slpc: Fix inconsistent locked return 
Fix for intel_guc_slpc_set_min_freq() warn:
inconsistent returns '&slpc->lock'.

v2: Avoid with_intel_runtime_pm with the
    internal goto/return. (Ashutosh)
    Also standardize the 'ret' if this came from
    the efficient setup. And avoid the 'unlikely'.

Fixes: 95ccf312a1 ("drm/i915/guc/slpc: Allow SLPC to use efficient frequency")
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220830193537.52201-1-rodrigo.vivi@intel.com
 2022-08-31 15:56:44 -04:00
Ville Syrjälä
a5810f551d drm/i915: Allow more varied alternate fixed modes for panels 
On some systems the panel reports alternate modes with
different blanking periods. If the EDID reports them and VBT
doesn't tell us otherwise then I can't really see why they
should be rejected. So allow their use for the purposes of
static DRRS.

For seamless DRRS we still require a much more exact match
of course. But that logic only kicks in when selecting the
downclock mode (or in the future when determining whether
we can do a seamless refresh rate change due to a user
modeset).

Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/6374
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220830212436.2021-1-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2022-08-31 20:01:32 +03:00
Ville Syrjälä
a06289f3f7 drm/i915/bios: Copy the whole MIPI sequence block 
Turns out the MIPI sequence block version number and
new block size fields are considered part of the block
header and are not included in the reported new block size
field itself. Bump up the block size appropriately so that
we'll copy over the last five bytes of the block as well.

For this particular machine those last five bytes included
parts of the GPIO op for the backlight on sequence, causing
the backlight no longer to turn back on:

 		Sequence 6 - MIPI_SEQ_BACKLIGHT_ON
 			Delay: 20000 us
-			GPIO index 0, number 0, set 0 (0x00)
+			GPIO index 1, number 70, set 1 (0x01)

Cc: stable@vger.kernel.org
Fixes: e163cfb4c9 ("drm/i915/bios: Make copies of VBT data blocks")
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/6652
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220829135834.8585-1-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2022-08-31 19:09:57 +03:00
Ville Syrjälä
06bfa86eee drm/i915/bios: Dump PNPID and panel name 
Dump the panel PNPID and name from the VBT.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220510104242.6099-16-ville.syrjala@linux.intel.com
 2022-08-31 19:09:55 +03:00
Jani Nikula
03e067bc73 drm/i915/fence: replace BUG_ON() with BUILD_BUG_ON() 
Avoid BUG_ON(). Since __i915_sw_fence_init() is always called via a
wrapper macro, we can replace it with a compile time BUILD_BUG_ON().

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220830093411.1511040-5-jani.nikula@intel.com
 2022-08-31 18:34:11 +03:00
Jani Nikula
6f10c4d623 drm/i915/perf: replace BUG_ON() with WARN_ON() 
Avoid BUG_ON(). Replace with WARN_ON() and early return.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220830093411.1511040-4-jani.nikula@intel.com
 2022-08-31 18:34:10 +03:00
Jani Nikula
8482af4bd2 drm/i915/pch: replace BUG_ON() with drm_WARN_ON() 
Avoid BUG_ON(). Replace with drm_WARN_ON().

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220830093411.1511040-3-jani.nikula@intel.com
 2022-08-31 18:34:08 +03:00
Jani Nikula
b801a98f81 drm/i915/dpll: replace BUG_ON() with drm_WARN_ON() 
Avoid BUG_ON(). Actually check the dpll count and bail out loudly with
drm_WARN_ON() from the loop before overflowing
i915->dpll.shared_dplls[].

v2: Rebase

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220830093411.1511040-2-jani.nikula@intel.com
 2022-08-31 18:33:55 +03:00
Jani Nikula
99f37216b3 drm/i915/crt: remove BUG_ON() 
Avoid BUG_ON(). We don't have such checks on output type anywhere else
either, so just remove.

Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220830093411.1511040-1-jani.nikula@intel.com
 2022-08-31 18:33:35 +03:00
Jani Nikula
0514b50cf7 drm/i915/gmbus: mass dev_priv -> i915 rename 
Now that gmbus no longer uses macros that assume dev_priv is implicitly
available, mass rename dev_priv to i915 in gmbus code.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/fcf16a65f7975379a887ed57c623b25de7b344c8.1661855191.git.jani.nikula@intel.com
 2022-08-31 18:09:27 +03:00
Jani Nikula
3721d4fb76 drm/i915/reg: stop using implicit dev_priv in DSPCLK_GATE_D 
Remove the implicit dev_priv usage in DSPCLK_GATE_D register, and pass
it as parameter.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/41ca83573ca2d94bea568058f8cb8c35e814f8b1.1661855191.git.jani.nikula@intel.com
 2022-08-31 18:09:23 +03:00
Jani Nikula
6d737d9bff drm/i915/gmbus: stop using implicit dev_priv in register definitions 
Since the beginning of time, we've implicitly assumed dev_priv is
present as a local variable in many places. We've gone a long way in
removing many of them, but the register macro definitions are the last
holdout. Remove them from the gmbus macros.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/a4f482c1f523d7225420f8386f1eea6d639db843.1661855191.git.jani.nikula@intel.com
 2022-08-31 18:09:20 +03:00
Jani Nikula
4567084c30 drm/i915/gmbus: add wrapper for gmbus mmio base 
Don't repeat the same thing so much.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/db360d824d47601d5ca843afa6f5d6ee17d0e514.1661855191.git.jani.nikula@intel.com
 2022-08-31 18:09:16 +03:00
Jani Nikula
3047d7060e drm/i915/gmbus: whitespace cleanup in reg definitions 
Simple whitespace cleanup and comment movement.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/50df38c9f3e53dba64429b7eaa6c0d7bfaf74078.1661855191.git.jani.nikula@intel.com
 2022-08-31 18:09:13 +03:00
Jani Nikula
51b072de8e drm/i915/gmbus: split out gmbus regs in a separate file 
Declutter i915_reg.h, and also observe very few places need the gmbus
register defitions.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/820807f404e548ab365b934d44f01b306eaa28c2.1661855191.git.jani.nikula@intel.com
 2022-08-31 18:07:46 +03:00
Jani Nikula
fe28c7c120 drm/i915: move and group properties under display.properties 
Move display property related members under drm_i915_private display
sub-struct.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/14b14f871e322419b10166c1bd8a5a956f5430c8.1661779055.git.jani.nikula@intel.com
 2022-08-31 17:21:56 +03:00
Jani Nikula
a71e7d77fb drm/i915: move atomic_helper under display sub-struct 
Move display atomic helper related members under drm_i915_private
display sub-struct.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1d864238a92a32d52ea70c0079c910cc90955324.1661779055.git.jani.nikula@intel.com
 2022-08-31 17:21:54 +03:00
Jani Nikula
6493d4a96f drm/i915: move quirks under display sub-struct 
Move display quirk related members under drm_i915_private display
sub-struct.

Prefer adding anonymous sub-structs even for single members that aren't
our own structs.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/c4a1a5657023efe24a362c67daf79260f179f0eb.1661779055.git.jani.nikula@intel.com
 2022-08-31 17:21:51 +03:00
Jani Nikula
deb141510f drm/i915/quirks: abstract quirks further by making quirk ids an enum 
Turn the quirk ids to enums instead of bits, and hide the masking inside
intel_quirks.c. Define the enums in intel_quirks.h to declutter
i915_drv.h while at it.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/60d8a20e1f8845b0bef53c2e32d524be888e426d.1661779055.git.jani.nikula@intel.com
 2022-08-31 17:21:47 +03:00
Jani Nikula
0c82118b0a drm/i915/quirks: abstract checking for display quirks 
Add intel_has_quirk() for checking if a display quirk is present. Avoid
accessing i915->quirks all over the place.

v2: Rebase

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/74f954ca81a8068033141a15686dffd01ad9b0f9.1661779055.git.jani.nikula@intel.com
 2022-08-31 17:21:43 +03:00
Jani Nikula
b202ab6173 drm/i915: move and group modeset_wq and flip_wq under display.wq 
Move display workqueue related members under drm_i915_private display
sub-struct.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/f34f7fb45510e880ce0cc16cb2fbba72fbe94a1d.1661779055.git.jani.nikula@intel.com
 2022-08-31 17:21:38 +03:00
Jani Nikula
b7d1559038 drm/i915: move dbuf under display sub-struct 
Move display dbuf related members under drm_i915_private display
sub-struct.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/3363a516c12bd8bfb240131e9eb9fc3a0f3057a3.1661779055.git.jani.nikula@intel.com
 2022-08-31 17:21:34 +03:00
Jani Nikula
5da6d6c792 drm/i915: move fb_tracking under display sub-struct 
Move display frontbuffer tracking related members under drm_i915_private
display sub-struct.

Rename struct i915_frontbuffer_tracking to intel_frontbuffer_tracking
while at it.

FIXME: fb_tracking.lock mutex init should be moved away from
i915_gem_init_early().

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/a5444d0a373afca46da9a2f6e4db442af21b429b.1661779055.git.jani.nikula@intel.com
 2022-08-31 17:21:29 +03:00
Jani Nikula
20478b8807 drm/i915: move and group fdi members under display.fdi 
Move display fdi related members under drm_i915_private display
sub-struct.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/b66fe7cf2c6f9e5b7bbfcaff40400492ac706721.1661779055.git.jani.nikula@intel.com
 2022-08-31 15:20:07 +03:00
Jani Nikula
e3e8148f43 drm/i915: move and group power related members under display.power 
Move display power related members under drm_i915_private display
sub-struct.

Arguably chv_phy_control and chv_phy_assert could be placed in a phy
substruct, but they are only used in the power code.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/57bfa82f6fe85a775f80c398b2a7dff77b9452b0.1661779055.git.jani.nikula@intel.com
 2022-08-31 15:19:58 +03:00
Jani Nikula
80b3842f21 drm/i915: move fbc to display.fbc 
Move display FBC related members under drm_i915_private display
sub-struct.

Pointers and arrays of pointers to structs that we defined are fine
without a sub-struct wrapping.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1151469ec13d392df86b72a375f490fd70a3257a.1661779055.git.jani.nikula@intel.com
 2022-08-31 15:19:51 +03:00
Jani Nikula
a434689c0a drm/i915: move vbt to display.vbt 
Move display VBT related members under drm_i915_private display
sub-struct.

v2: Rebase

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/db4b648b201ea0b79654fec2028120999a735db0.1661779055.git.jani.nikula@intel.com
 2022-08-31 15:19:39 +03:00
Jani Nikula
90b87cf243 drm/i915: move mipi_mmio_base to display.dsi 
Move display DSI related members under drm_i915_private display
sub-struct.

Prefer adding anonymous sub-structs even for single members that aren't
our own structs.

Abstract mmio base member access in register definitions in a macro.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/dc7c5a871fe558a809ea943eca5c71dfff1740a8.1661779055.git.jani.nikula@intel.com
 2022-08-31 15:19:33 +03:00