2 Commits

Author	SHA1	Message	Date
Gary Yang	01a08fd967	dt-bindings: arm: cix: add OrangePi 6 Plus board ... OrangePi 6 Plus adopts CIX CD8180/CD8160 SoC, built-in 12-core 64-bit processor + NPU processor,integrated graphics processor, equipped with 16GB/32GB/64GB LPDDR5, and provides two M.2 KEY-M interfaces 2280 for NVMe SSD,as well as SPI FLASH and TF slots to meet the needs of fast read/write and high-capacity storage Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Gary Yang <gary.yang@cixtech.com> Link: https://lore.kernel.org/r/20260110093406.2700505-2-gary.yang@cixtech.com Signed-off-by: Peter Chen <peter.chen@cixtech.com>	2026-01-12 09:08:12 +08:00
Peter Chen	69563d502c	dt-bindings: arm: add CIX P1 (SKY1) SoC ... Add device tree bindings for CIX P1 (Internal name sky1) Arm SoC, it consists several SoC models like CP8180, CD8180, etc. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Fugang Duan <fugang.duan@cixtech.com> Signed-off-by: Peter Chen <peter.chen@cixtech.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>	2025-07-21 17:14:55 +02:00