Baihan Li
6dad7fa858
drm/hisilicon/hibmc: Adding reset colorbar cfg in dp init.
...
Add colorbar disable operation before reset chontroller, to make sure
colorbar status is clear in the DP init, so if rmmod the driver and the
previous colorbar configuration will not affect the next time insmod the
driver.
Fixes: 3c7623fb5b ("drm/hisilicon/hibmc: Enable this hot plug detect of irq feature")
Signed-off-by: Baihan Li <libaihan@huawei.com >
Signed-off-by: Yongbang Shi <shiyongbang@huawei.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Reviewed-by: Tao Tian <tiantao6@hisilicon.com >
Link: https://patch.msgid.link/20251210023759.3944834-5-shiyongbang@huawei.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2026-01-20 10:53:14 +02:00
Baihan Li
0607052a6a
drm/hisilicon/hibmc: fix no showing problem with loading hibmc manually
...
When using command rmmod and insmod, there is no showing in second time
insmoding. Because DP controller won't send HPD signals, if connection
doesn't change or controller isn't reset. So add reset before unreset
in hibmc_dp_hw_init().
And also need to move the HDCP cfg after DP controller de-resets, so
that HDCP configuration takes effect.
Fixes: 3c7623fb5b ("drm/hisilicon/hibmc: Enable this hot plug detect of irq feature")
Signed-off-by: Baihan Li <libaihan@huawei.com >
Signed-off-by: Yongbang Shi <shiyongbang@huawei.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Reviewed-by: Tao Tian <tiantao6@hisilicon.com >
Link: https://patch.msgid.link/20251210023759.3944834-4-shiyongbang@huawei.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2026-01-20 10:53:14 +02:00
Baihan Li
607805abfb
drm/hisilicon/hibmc: add dp mode valid check
...
If DP is connected, check the DP BW in mode_valid_ctx() to ensure
that DP's link rate supports high-resolution data transmission.
Fixes: 0ab6ea261c ("drm/hisilicon/hibmc: add dp module in hibmc")
Signed-off-by: Baihan Li <libaihan@huawei.com >
Signed-off-by: Yongbang Shi <shiyongbang@huawei.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Reviewed-by: Tao Tian <tiantao6@hisilicon.com >
Link: https://patch.msgid.link/20251210023759.3944834-3-shiyongbang@huawei.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2026-01-20 10:53:14 +02:00
Baihan Li
3906e7a3b2
drm/hisilicon/hibmc: fix dp probabilistical detect errors after HPD irq
...
The issue is that drm_connector_helper_detect_from_ddc() returns wrong
status when plugging or unplugging the monitor, which may cause the link
failed err.[0] Use HPD pin status in DP's detect_ctx() for real physical
monitor in/out, and implement a complete DP detection including read DPCD,
check if it's a branch device and its sink count for different situations.
[0]:
hibme-drm 0000:83:00.0: [drm] *ERROR* channel equalization failed 5 times
hibme-drm 0000:83:00.0: [drm] *ERROR* channel equalization failed 5 times
hibme-drm 0000:83:00.0: [drm] *ERROR* dp link training failed, ret: -16
hibmc-drm 0000:83:00.0: [drm] *ERROR* hibme dp mode set failed: -16
Fixes: 3c7623fb5b ("drm/hisilicon/hibmc: Enable this hot plug detect of irq feature")
Signed-off-by: Baihan Li <libaihan@huawei.com >
Signed-off-by: Yongbang Shi <shiyongbang@huawei.com >
Reviewed-by: Tao Tian <tiantao6@hisilicon.com >
Link: https://patch.msgid.link/20251210023759.3944834-2-shiyongbang@huawei.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2026-01-20 10:53:14 +02:00
Baihan Li
9f98b429ba
drm/hisilicon/hibmc: fix rare monitors cannot display problem
...
In some case, the dp link training success at 8.1Gbps, but the sink's
maximum supported rate is less than 8.1G. So change the default 8.1Gbps
link rate to the rate that reads from devices' capabilities.
Fixes: 54063d86e0 ("drm/hisilicon/hibmc: add dp link moduel in hibmc drivers")
Signed-off-by: Baihan Li <libaihan@huawei.com >
Signed-off-by: Yongbang Shi <shiyongbang@huawei.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Link: https://lore.kernel.org/r/20250813094238.3722345-6-shiyongbang@huawei.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2025-08-17 18:22:05 +03:00
Baihan Li
b11bc1ae46
drm/hisilicon/hibmc: Add MSI irq getting and requesting for HPD
...
To realize HPD feature, request irq for HPD , add its handler function.
We use pci_alloc_irq_vectors() to get our msi irq, because we have two
interrupts now.
Signed-off-by: Baihan Li <libaihan@huawei.com >
Signed-off-by: Yongbang Shi <shiyongbang@huawei.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20250331074212.3370287-9-shiyongbang@huawei.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2025-04-11 14:42:13 +03:00
Baihan Li
3c7623fb5b
drm/hisilicon/hibmc: Enable this hot plug detect of irq feature
...
Add HPD interrupt enable functions in drm framework, and also add
detect_ctx functions. Because of the debouncing when HPD pulled out,
add 200 ms delay in detect. Add link reset process to reset link status
when a new connector pulgged in.
Signed-off-by: Baihan Li <libaihan@huawei.com >
Signed-off-by: Yongbang Shi <shiyongbang@huawei.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20250331074212.3370287-8-shiyongbang@huawei.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2025-04-11 14:42:13 +03:00
Baihan Li
2f6182616c
drm/hisilicon/hibmc: Add colorbar-cfg feature and its debugfs file
...
DP controller can support generating a color bar signal over the
DisplayPort interface. This can be useful to check for possible DDR
or GPU problems, as the signal generator resides completely in the DP
block. Add debugfs file that controls colorbar generator.
echo: config the color bar register to display
cat: print the color bar configuration
Signed-off-by: Baihan Li <libaihan@huawei.com >
Signed-off-by: Yongbang Shi <shiyongbang@huawei.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20250331074212.3370287-7-shiyongbang@huawei.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2025-04-11 14:42:12 +03:00
Baihan Li
bd1c935811
drm/hisilicon/hibmc: Getting connector info and EDID by using AUX channel
...
Add registering drm_aux and use it to get connector edid with drm
functions. Add ddc channel in connector initialization to put drm_aux
in drm_connector.
Signed-off-by: Baihan Li <libaihan@huawei.com >
Signed-off-by: Yongbang Shi <shiyongbang@huawei.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20250331074212.3370287-6-shiyongbang@huawei.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2025-04-11 14:42:12 +03:00
Baihan Li
1e7f35512e
drm/hisilicon/hibmc: Refactor the member of drm_aux in struct hibmc_dp
...
Because the drm_aux of struct hibmc_dp_dev's member is not easy to get in
hibmc_drm_dp.c, move the drm_aux to struct hibmc_dp. Then there are some
adaptations and modifications to make this patch compile.
Signed-off-by: Baihan Li <libaihan@huawei.com >
Signed-off-by: Yongbang Shi <shiyongbang@huawei.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20250331074212.3370287-5-shiyongbang@huawei.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2025-04-11 14:42:12 +03:00
Baihan Li
5f80fb4d6a
drm/hisilicon/hibmc: Add dp serdes cfg in dp process
...
Add dp serdes cfg in link training process, and related adapting
and modificating. Change some init values about training, because we want
completely to negotiation process, so we start with the maximum rate and
the electrical characteristic level is 0. Because serdes default cfgs is
changed and used in hibmc_kms_init(), we changed the if-statement to check
whether the value is 0.
Signed-off-by: Baihan Li <libaihan@huawei.com >
Signed-off-by: Yongbang Shi <shiyongbang@huawei.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20250331074212.3370287-4-shiyongbang@huawei.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2025-04-11 14:40:00 +03:00
Baihan Li
9e736cd444
drm/hisilicon/hibmc: Add dp serdes cfg to adjust serdes rate, voltage and pre-emphasis
...
This dp controller need features of digital-to-analog conversion and
high-speed transmission in chip by its extern serdes controller. Our
serdes cfg is relatively simple, just need two register configurations.
Don't need too much functions, like: power on/off, initialize, and some
complex configurations, so I'm not going to use the phy framework.
This serdes is inited and configured in dp initialization, and also
integrating them into link training process.
For rate changing, we can change from 1.62-8.2Gpbs by cfg reg.
For voltage and pre-emphasis levels changing, we can cfg different
serdes ffe value.
Signed-off-by: Baihan Li <libaihan@huawei.com >
Signed-off-by: Yongbang Shi <shiyongbang@huawei.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20250331074212.3370287-3-shiyongbang@huawei.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2025-04-11 14:40:00 +03:00
Baihan Li
f9698f802e
drm/hisilicon/hibmc: Restructuring the header dp_reg.h
...
Move the macros below their corresponding registers to make
them more obvious.
Signed-off-by: Baihan Li <libaihan@huawei.com >
Signed-off-by: Yongbang Shi <shiyongbang@huawei.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20250331074212.3370287-2-shiyongbang@huawei.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2025-04-11 14:40:00 +03:00
Dmitry Baryshkov
fcbb93f1e4
drm/display: dp: change drm_dp_dpcd_read_link_status() return value
...
drm_dp_dpcd_read_link_status() follows the "return error code or number
of bytes read" protocol, with the code returning less bytes than
requested in case of some errors. However most of the drivers
interpreted that as "return error code in case of any error". Switch
drm_dp_dpcd_read_link_status() to drm_dp_dpcd_read_data() and make it
follow that protocol too.
Acked-by: Jani Nikula <jani.nikula@intel.com >
Reviewed-by: Lyude Paul <lyude@redhat.com >
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20250324-drm-rework-dpcd-access-v4-2-e80ff89593df@oss.qualcomm.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2025-03-25 16:20:38 +02:00
Baihan Li
94ee73ee30
drm/hisilicon/hibmc: add dp hw moduel in hibmc driver
...
Build a dp level that hibmc driver can enable dp by
calling their functions.
Signed-off-by: Baihan Li <libaihan@huawei.com >
Signed-off-by: Yongbang Shi <shiyongbang@huawei.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Reviewed-by: Tian Tao <tiantao6@hisilicon.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20250103093824.1963816-4-shiyongbang@huawei.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
2025-01-03 12:42:10 +02:00
Baihan Li
54063d86e0
drm/hisilicon/hibmc: add dp link moduel in hibmc drivers
...
Add link training process functions in this moduel.
Signed-off-by: Baihan Li <libaihan@huawei.com >
Signed-off-by: Yongbang Shi <shiyongbang@huawei.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Reviewed-by: Tian Tao <tiantao6@hisilicon.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20250103093824.1963816-3-shiyongbang@huawei.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
2025-01-03 12:42:10 +02:00
Baihan Li
057e779725
drm/hisilicon/hibmc: add dp aux in hibmc drivers
...
Add dp aux read/write functions. They are basic functions
and will be used later.
Signed-off-by: Baihan Li <libaihan@huawei.com >
Signed-off-by: Yongbang Shi <shiyongbang@huawei.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Reviewed-by: Tian Tao <tiantao6@hisilicon.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20250103093824.1963816-2-shiyongbang@huawei.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
2025-01-03 12:42:10 +02:00