Commit Graph

10 Commits

Author SHA1 Message Date
Alexandre Courbot
9ce480fead drm/nouveau/pmu: add msgqueue member
NVIDIA-provided PMU firmware is controlled by a msgqueue. Add a member
to the PMU structure as well as the required cleanup code if this
feature is used.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-03-07 17:05:12 +10:00
Alexandre Courbot
b1c39d801a drm/nouveau/gm20b: add dummy PMU device
Add a dummy PMU device so the PMU falcon is instanciated and can be used
by secure boot.

We could reuse gk20a's implementation here, but it would fight with
secboot over PMU falcon's ownership and secboot will reset the PMU,
preventing it from operating afterwards. Proper handout between secboot
and pmu is coming along with the actual gm20b PMU implementation, so
use this as a temporary solution.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-02-17 15:14:31 +10:00
Alexandre Courbot
1e2115d8c0 drm/nouveau/pmu: instanciate the falcon in PMU device
Have an instance of nvkm_falcon in the PMU structure, ready to be used
by other subdevs (i.e. secboot).

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-02-17 15:14:30 +10:00
Ben Skeggs
d91ccec631 drm/nouveau/pmu/gp102: initial implementation
GP102/GP104 require a harder reset of PMU prior to DEVINIT, or the IFR
image will hang.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-11-17 09:50:37 +10:00
Ben Skeggs
41c7be6913 drm/nouveau/pmu/gp100: initial implementation
Just enough to hookup preinit reset(), which DEVINIT will depend on later.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-11-17 09:50:36 +10:00
Ben Skeggs
e2ca4e7d6e drm/nouveau/pmu: convert to new-style nvkm_subdev
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:45 +10:00
Ben Skeggs
5a7d1e22fe drm/nouveau/pmu: cosmetic changes
This is purely preparation for upcoming commits, there should be no
code changes here.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:09 +10:00
Ben Skeggs
e1fc44fb9d drm/nouveau/pmu/gk110: implement gr power-up magic like PGOB on earlier chips
Turns out the PTHERM part of this dance is bracketed by the same PMU
fiddling that occurs on GK104/6, let's assume it's also PGOB.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-04-14 17:00:50 +10:00
Ben Skeggs
21b137916e drm/nouveau/pmu: namespace + nvidia gpu names (no binary change)
The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
which will be used for the DRM part of the driver.  This is being
done in order to make it very clear as to what part of the driver a
given symbol belongs to, and as a minor step towards splitting the
DRM driver out to be able to stand on its own (for virt).

Because there's already a large amount of churn here anyway, this is
as good a time as any to also switch to NVIDIA's device and chipset
naming to ease collaboration with them.

A comparison of objdump disassemblies proves no code changes.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-01-22 12:17:57 +10:00
Ben Skeggs
ebb58dc2ef drm/nouveau/pmu: rename from pwr (no binary change)
Switch to NVIDIA's name for the device.

The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
which will be used for the DRM part of the driver.  This is being
done in order to make it very clear as to what part of the driver a
given symbol belongs to, and as a minor step towards splitting the
DRM driver out to be able to stand on its own (for virt).

Because there's already a large amount of churn here anyway, this is
as good a time as any to also switch to NVIDIA's device and chipset
naming to ease collaboration with them.

A comparison of objdump disassemblies proves no code changes.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-01-22 12:17:43 +10:00