Commit Graph

17 Commits

Author SHA1 Message Date
Alexandre Courbot
af3a4f7efb drm/nouveau/fifo: add GP10B support
GP10B's FIFO is similar to GP100's, but only allows 512 channels.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-04-06 14:39:04 +10:00
Ben Skeggs
0cdc3fdfb7 drm/nouveau/fifo/gm107-: remove engines from mmu engine mapping array
These are specified by PTOP on Maxwell GPUs.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20 14:43:04 +10:00
Ben Skeggs
91419acf78 drm/nouveau/fifo/gk104-: abstract mmu fault data structures
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20 14:43:04 +10:00
Ben Skeggs
98ac3f061a drm/nouveau/fifo/gk104-: subclass func
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20 14:43:04 +10:00
Ben Skeggs
19f89279fa drm/nouveau/fifo/gk104: make use of topology info during fault recovery
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14 10:13:42 +10:00
Ben Skeggs
41e5171ba8 drm/nouveau/fifo/gk104: read device topology information from hw
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14 10:13:41 +10:00
Ben Skeggs
69aa40e276 drm/nouveau/fifo/gk104: cosmetic engine->runlist changes
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14 10:13:40 +10:00
Ben Skeggs
55252da161 drm/nouveau/fifo/gk104: identify fault-recovery members more clearly
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14 10:13:39 +10:00
Ben Skeggs
6d39b83f13 drm/nouveau/fifo/gk104: rename spoon to pbdma, and move detection to oneinit
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14 10:13:39 +10:00
Ben Skeggs
386ffd5e80 drm/nouveau/fifo/gk104: fix race condition when updating engine runlists
The CPU-side tracking of engine runlists was not protected by a lock,
leading to list corruption, eventually causing runlist_update() to
overrun the GPU-side runlist, triggering an OOPS.

Fixes some of the issues noticed during parallel piglit runs.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-01-11 11:17:40 +10:00
Ben Skeggs
68f3f702b6 drm/nouveau/core: remove the remainder of the previous style
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:47 +10:00
Ben Skeggs
13de7f4629 drm/nouveau/fifo: convert to new-style nvkm_engine
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:46 +10:00
Ben Skeggs
8f0649b5c6 drm/nouveau/fifo: convert user classes to new-style nvkm_object
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:40 +10:00
Ben Skeggs
9a65a38c45 drm/nouveau/fifo: split user classes out from engine implementations
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:40 +10:00
Alexandre Courbot
3326060a17 drm/nouveau/fifo: add GM20B fifo
GM20B has a 512-channels FIFO similar to GK104.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:02 +10:00
Ben Skeggs
89025bd458 drm/nouveau/fifo/gm204: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-04-14 17:00:55 +10:00
Ben Skeggs
05c7145dae drm/nouveau/fifo: namespace + nvidia gpu names (no binary change)
The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
which will be used for the DRM part of the driver.  This is being
done in order to make it very clear as to what part of the driver a
given symbol belongs to, and as a minor step towards splitting the
DRM driver out to be able to stand on its own (for virt).

Because there's already a large amount of churn here anyway, this is
as good a time as any to also switch to NVIDIA's device and chipset
naming to ease collaboration with them.

A comparison of objdump disassemblies proves no code changes.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-01-22 12:18:02 +10:00