Anusha Srivatsa
0b58436f2d
drm/i915/icp: Introduce Ice Lake PCH
...
Add the enum additions to ICP PCH.
v2 (from Paulo): don't set any platforms to it yet since ICP support is
incomplete.
v3 (from Rodrigo): Fix ICP name.
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180111180010.24357-4-paulo.r.zanoni@intel.com
2018-01-19 17:54:01 -02:00
Rodrigo Vivi
412310019a
drm/i915/icl: Add initial Icelake definitions.
...
Icelake is an Intel® Processor containing an Intel® Graphics
Controller.
This is just an initial Icelake definition. PCI IDs, Icelake support
and new features coming in following patches.
v2: Add .ddb_size and .has_guc (Michal Wajdeczko).
v3: Add the ICL_FEATURES macro (Kelvin Gardiner).
v4 (from Paulo): Add missing __initconst (Paulo) and say "graphics
controller" instead of something that looks like an official marketing
name but isn't (Chris).
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180111180010.24357-3-paulo.r.zanoni@intel.com
2018-01-19 17:52:59 -02:00
Rodrigo Vivi
841b5ed7aa
drm/i915/cnl: Add Port F definition.
...
Some Cannonlake SKUs will come with a full split between
port A and port E. This will be called port F although it
is not a 6th port, but only a split.
Note this patch alone is not sufficient for port F enabling,
it's just the first step.
v2: Fix size of dvo_ports found by Ander.
v3: Adding missing cases from intel_bios.c for Port_F
v4: Adding other missing cases and fix the commit message.
v5: Rebase on top of display headers rework.
v6 (from Paulo): improve commit message, bikeshed bit definitions.
Cc: Lucas De Marchi <lucas.demarchi@intel.com >
Cc: Manasi Navare <manasi.d.navare@intel.com >
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180111180010.24357-2-paulo.r.zanoni@intel.com
2018-01-19 17:51:35 -02:00
Mika Kahola
0b7029b7e4
drm/i915: Check for fused or unused pipes
...
We may have fused or unused pipes in our system. Let's check that the pipe
in question is within limits of accessible pipes. In case, that we are not
able to access the pipe, we return early with a warning.
v2: Rephrasing of the commit message (Jani)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103206
Reported-by: Thomas Gleixner <tglx@linutronix.de >
Tested-by: Jaswinder Singh Rajput <jaswinder@perfectintelligent.com >
Suggested-by: Jani Nikula <jani.nikula@intel.com >
Reviewed-by: Jani Nikula <jani.nikula@intel.com >
Signed-off-by: Mika Kahola <mika.kahola@intel.com >
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/1513584243-12607-1-git-send-email-mika.kahola@intel.com
2018-01-19 16:15:50 +02:00
Ville Syrjälä
8a97bbcce8
drm/i915: Allow up to 32KB stride on SKL+ "sprites"
...
SKL+ "sprites" no longer have 16KB max stride limit that earlier
platforms had. Bump up the limit to 32KB.
Cc: Ben Widawsky <ben@bwidawsk.net >
Cc: Jason Ekstrand <jason@jlekstrand.net >
Cc: Daniel Stone <daniels@collabora.com >
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20171222192231.17981-7-ville.syrjala@linux.intel.com
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch >
2018-01-19 15:33:58 +02:00
Ville Syrjälä
77064e2eb8
drm/i915: Add CCS capability for sprites
...
Allow sprites to scan out compressed framebuffers.
Since different platforms have a different set of planes that
support CCS let's add a small helper to determine whether a
specific plane supports CCS or not. Currently that information
is spread around in many places, and not all the pieces of
code even agree with each other.
In addition to allowing sprites to scan out compressed fbs,
the other fix here is that we stop rejecting them on pipe C
on CNL.
Cc: Ben Widawsky <ben@bwidawsk.net >
Cc: Jason Ekstrand <jason@jlekstrand.net >
Cc: Daniel Stone <daniels@collabora.com >
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20171222192231.17981-6-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com >
2018-01-19 15:33:58 +02:00
Ville Syrjälä
c21f7904c7
drm/i915: Clean up the sprite modifier checks
...
Split the g4x and snb cases into separate functions to match how we deal
with all other platforms. Also sort the switch cases to match the format
lists we've declared earlier, to ease comparisons.
Cc: Ben Widawsky <ben@bwidawsk.net >
Cc: Jason Ekstrand <jason@jlekstrand.net >
Cc: Daniel Stone <daniels@collabora.com >
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20171222192231.17981-5-ville.syrjala@linux.intel.com
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch >
2018-01-19 15:33:58 +02:00
Ville Syrjälä
74ac160b3f
drm/i915: Add the missing Y/Yf modifiers for SKL+ sprites
...
Y/Yf were dropped out from the SKL+ sprite modifier list on account
of some watermark issues Daniel Stone was having. My subsequent testing
seemed to indicate that things work better now, so add the modifiers
back in.
v2: Update the commit message with a better explanation
Cc: Ben Widawsky <ben@bwidawsk.net >
Cc: Jason Ekstrand <jason@jlekstrand.net >
Cc: Daniel Stone <daniels@collabora.com >
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20171222192231.17981-4-ville.syrjala@linux.intel.com
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch >
2018-01-19 15:33:58 +02:00
Ville Syrjälä
e13a3183da
drm/i915: Nuke a pointless unreachable()
...
The unreachable() is very much unreachable and the compiler knows
that, so there's no point in having it.
Cc: Ben Widawsky <ben@bwidawsk.net >
Cc: Jason Ekstrand <jason@jlekstrand.net >
Cc: Daniel Stone <daniels@collabora.com >
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20171222192231.17981-3-ville.syrjala@linux.intel.com
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch >
2018-01-19 15:33:58 +02:00
Abdiel Janulgue
3019062905
drm/i915: Ignore TMDS clock limit for DP++ when EDID override is set
...
4K modes testing by using dummy EDID data has never been working
properly on boxes with DP++ (dual-mode) adaptors. The reason for
this is that those modes got pruned during hdmi mode validation.
intel_hdmi_mode_valid returns CLOCK_HIGH because the pixel clock
reported by the 4k mode is higher than dual port TMDS clock limit.
However 4k injection does work properly on machines that don't have
DP++ adapters because the mode is never validated against the DP++
TMDS clock limit.
v2: Don't detect the DP++ limits when we're testing using overridden
EDIDs. Make sure to check for the override condition after
respecting the value of drm_dp_dual_mode_detect (Jani Nikula).
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101649
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com >
Cc: Jani Nikula <jani.nikula@intel.com >
Cc: Daniel Vetter <daniel.vetter@ffwll.ch >
Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com >
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20171215102055.11729-1-abdiel.janulgue@linux.intel.com
2018-01-19 12:31:33 +02:00
Jani Nikula
a4dd90b1cb
drm/i915: remove redundant ELD connector type update
...
drm_edid_to_eld() sets ELD connector type since commit 1d1c366507
("drm/edid: set ELD connector type in drm_edid_to_eld()"). Remove the
redundant update.
(Commit c945b8c14b ("drm/edid: build ELD in drm_add_edid_modes()") and
commit d471ed04b4 ("drm/drivers: drop redundant drm_edid_to_eld()
calls") are also related.)
v2: Rebase, update commit message with commit references.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Thierry Reding <treding@nvidia.com >
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20171229125547.28672-1-jani.nikula@intel.com
2018-01-19 11:58:48 +02:00
Jani Nikula
3cfd32654b
drm/i915: vbt defs typo fixes
...
No more sing-a-ling.
Reported-by: Adam Jackson <ajax@redhat.com >
You're-my-ding-a-ling-by: Chris Wilson <chris@chris-wilson.co.uk >
Reviewed-by: David Weinehall <david.weinehall@linux.intel.com >
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180118150613.26140-1-jani.nikula@intel.com
2018-01-19 10:20:16 +02:00
Ramalingam C
49d85d0342
drm/i915: Check for downstream topology errors
...
HDCP compliant Repeaters can support max of 127 devices and max
depth of 7 for downstream topology.
If these max limits are exceeded, repeater will set the
topology error flags MAX_CASCADE_EXCEEDED and/or MAX_DEVS_EXCEEDED
in Bstatus followed by asserting READY/CP_IRQ for HDCP transmitter.
This patch check for these error flags as soon as READY bit is asserted.
Signed-off-by: Ramalingam C <ramalingam.c@intel.com >
[seanpaul fixed checkpatch alignment issue]
Signed-off-by: Sean Paul <seanpaul@chromium.org >
Link: https://patchwork.freedesktop.org/patch/msgid/1516254488-4971-5-git-send-email-ramalingam.c@intel.com
2018-01-18 17:56:02 -05:00
Ramalingam C
24b42cbadb
drm/i915: Start repeater auth on READY/CP_IRQ
...
Second stage of HDCP authentication starts at CP_IRQ or at the
assertion of READY bit from Repeater.
Till then repeater will be authenticating with its downstream devices.
So authenticated device count, depth and ksv_list readable from
repeaters are valid only after assertion of READY/CP_IRQ.
This patch makes sure that READY is polled before reading any
topology information.
Signed-off-by: Ramalingam C <ramalingam.c@intel.com >
Signed-off-by: Sean Paul <seanpaul@chromium.org >
Link: https://patchwork.freedesktop.org/patch/msgid/1516254488-4971-4-git-send-email-ramalingam.c@intel.com
2018-01-18 17:55:26 -05:00
Ramalingam C
87eb3ec818
drm/i915: II stage HDCP auth for repeater only
...
Second stage of HDCP authentication required only if the HDCP
sink is a repeater.
This patch imposes above condition on second stage HDCP authentication.
Signed-off-by: Ramalingam C <ramalingam.c@intel.com >
Signed-off-by: Sean Paul <seanpaul@chromium.org >
Link: https://patchwork.freedesktop.org/patch/msgid/1516254488-4971-3-git-send-email-ramalingam.c@intel.com
2018-01-18 17:55:13 -05:00
Ramalingam C
fdddd08c48
drm/i915: Extending HDCP for HSW, BDW and BXT+
...
This patch extends the Key load process and hdcp initialization for
few more capable intel platforms i.e. HSW, BDW and BXT+.
Signed-off-by: Ramalingam C <ramalingam.c@intel.com >
[seanpaul fixed checkpatch issues]
Signed-off-by: Sean Paul <seanpaul@chromium.org >
Link: https://patchwork.freedesktop.org/patch/msgid/1516254488-4971-2-git-send-email-ramalingam.c@intel.com
2018-01-18 17:28:49 -05:00
Jani Nikula
c4fb60b9ab
drm/i915/bios: add DP max link rate to VBT child device struct
...
Update VBT defs to reflect revision 216. While at it, default the
expected child device struct size to sizeof the size rather than a
hardcoded value.
v2: Fix bit order (David)
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com >
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180118153310.32437-1-jani.nikula@intel.com
2018-01-18 12:13:40 -08:00
Lucas De Marchi
ddd39e4b3f
drm/i915/cnl: apply Display WA #1178 to fix type C dongles
...
Display WA #1178 is meant to fix Aux channel voltage swing too low with
some type C dongles. Although it is for type C, HW engineers reported
that it can be applied to all external ports even if they are not going
to type C.
For CNL we apply the workaround every time Aux B, C and D are powering
up since they will lose the configuration when powered down.
v2: Use common tag for WA
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com >
Cc: Arthur J Runyan <arthur.j.runyan@intel.com >
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com >
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20171128220553.22435-1-lucas.demarchi@intel.com
2018-01-18 11:45:08 -08:00
Michel Thierry
1edf6958c1
drm/i915: Use the engine name directly in the error_state file
...
Instead of using local string names that we will have to keep
maintaining, use the engine->name directly.
v2: Better invalid engine_id handling, capture_bo will not be able know
the engine_id and end up with -1 (Michal).
Suggested-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Signed-off-by: Michel Thierry <michel.thierry@intel.com >
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com >
Cc: Chris Wilson <chris@chris-wilson.co.uk >
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180110012151.28261-1-michel.thierry@intel.com
[ickle: minor massaging of function names]
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Link: https://patchwork.freedesktop.org/patch/msgid/20180118175228.2830-1-chris@chris-wilson.co.uk
2018-01-18 18:16:30 +00:00
Michal Wajdeczko
35fe703c31
drm/i915/guc: Change values for i915_guc_log_control
...
Today we have format mismatch between read/write operations
of i915_guc_log_control entry. For read we return (0, 1..4)
that represents disable/verbosity levels, but for write we
force user to follow internal structure format (0,1,9,11,13).
Let's hide internals from the user and accept same values
as we support for read and related guc_log_level modparam.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com >
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com >
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com >
Cc: Chris Wilson <chris@chris-wilson.co.uk >
Link: https://patchwork.freedesktop.org/patch/msgid/20180111152441.21676-2-michal.wajdeczko@intel.com
Reviewed-by: Sagar Arun Kamble <sagar.a.kamble@intel.com >
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
2018-01-18 17:15:49 +00:00
Michal Wajdeczko
0ed8795353
drm/i915/guc: Redefine guc_log_level modparam values
...
We used value -1 to indicate "disabled" and values 0..3 to
indicate "enabled", but most of our other modparams are using
-1 for "auto" mode and 0 for "disable". For consistency let's
change our log level values to:
-1: auto (depends on platform and Kconfig.debug settings)
0: disabled
1: enabled (severity level 0 = min)
2: enabled (severity level 1)
3: enabled (severity level 2)
4: enabled (severity level 3 = max)
v2: fix commit message (Sagar)
display sanitized modparam value (Sagar)
unify sanitize messages (Sagar/Michal)
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com >
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com >
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com >
Cc: Chris Wilson <chris@chris-wilson.co.uk >
Link: https://patchwork.freedesktop.org/patch/msgid/20180111152441.21676-1-michal.wajdeczko@intel.com
Reviewed-by: Sagar Arun Kamble <sagar.a.kamble@intel.com >
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
2018-01-18 17:15:48 +00:00
Chris Wilson
e9af4ea2b9
drm/i915: Avoid waitboosting on the active request
...
Watching a light workload on Baytrail (running glxgears and a 1080p
decode), instead of the system remaining at low frequency, the glxgears
would regularly trigger waitboosting after which it would have to spend
a few seconds throttling back down. In this case, the waitboosting is
counter productive as the minimal wait for glxgears doesn't prevent it
from functioning correctly and delivering frames on time. In this case,
glxgears happens to almost always be waiting on the current request,
which we already expect to complete quickly (see i915_spin_request) and
so avoiding the waitboost on the active request and spinning instead
provides the best latency without overcommitting to upclocking.
However, if the system falls behind we still force the waitboost.
Similarly, we will also trigger upclocking if we detect the system is
not delivering frames on time - again using a mechanism that tries to
detect a miss and not preemptively upclock.
v2: Also skip boosting for after missed vblank if the desired request is
already active.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com >
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
Cc: Radoslaw Szwichtenberg <radoslaw.szwichtenberg@intel.com >
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180118131609.16574-1-chris@chris-wilson.co.uk
2018-01-18 17:14:30 +00:00
Chris Wilson
b7fc1a9b7e
drm/i915/dp: Fix compilation of intel_dp_hdcp_check_link
...
drivers/gpu/drm/i915/intel_dp.c: In function ‘intel_dp_hdcp_check_link’:
drivers/gpu/drm/i915/intel_dp.c:5191:26: error: ?: using integer constants in boolean context [-Werror=int-in-bool-context]
return ret >= 0 ? -EIO : ret;
Fixes: 20f24d776d ("drm/i915: Implement HDCP for DisplayPort")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Cc: Daniel Vetter <daniel.vetter@ffwll.ch >
Cc: Ramalingam C <ramalingam.c@intel.com >
Cc: Sean Paul <seanpaul@chromium.org >
Cc: Jani Nikula <jani.nikula@linux.intel.com >
Signed-off-by: Sean Paul <seanpaul@chromium.org >
Link: https://patchwork.freedesktop.org/patch/msgid/20180118161025.22700-1-chris@chris-wilson.co.uk
2018-01-18 11:57:13 -05:00
Imre Deak
b6c51c3e28
drm/i915: Add tracking for CDCLK bypass frequency
...
The CDCLK bypass frequency can vary on upcoming platforms, so prepare
for that now by tracking its value in the CDCLK state.
Currently on BDW+ the bypass frequency is always the reference clock and
I didn't bother with earlier platforms since it's not all that clear
what's the bypass clock on those.
I also didn't bother adding support for changing this frequency, since
atm I don't see any need for it.
Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com >
Signed-off-by: Imre Deak <imre.deak@intel.com >
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180117172508.15993-1-imre.deak@intel.com
2018-01-18 16:08:55 +02:00
Chris Wilson
29d384e34c
drm/i915: Only attempt to scan the requested number of shrinker slabs
...
Since commit 4e773c3a8a ("drm/i915: Wire up shrinkctl->nr_scanned"),
we track the number of objects we scan and do not wish to exceed that as
it will overly penalise our own slabs under mempressure. Given that we
now know the target number of objects to scan, use that as our guide for
deciding to shrink as opposed to the number of objects we manage to
shrink (which doesn't correspond to the numbers we report to shrinkctl).
Fixes: 4e773c3a8a ("drm/i915: Wire up shrinkctl->nr_scanned")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180115212455.24046-2-chris@chris-wilson.co.uk
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
2018-01-18 09:19:05 +00:00
Dave Airlie
4a6cc7a44e
BackMerge tag 'v4.15-rc8' into drm-next
...
Linux 4.15-rc8
Daniel requested this for so the intel CI won't fall over on drm-next
so often.
2018-01-18 09:32:15 +10:00
Arnd Bergmann
c6270dbce9
drm: i915: remove timeval users
...
struct timeval is deprecated because it cannot represent times
past 2038. In this driver, the only use of this structure is
to capture debug information. This is easily changed to ktime_t,
which we then format as needed when printing it later.
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk >
Signed-off-by: Arnd Bergmann <arnd@arndb.de >
Link: https://patchwork.freedesktop.org/patch/msgid/20180117154916.219273-1-arnd@arndb.de
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
2018-01-17 18:03:44 +00:00
Chris Wilson
ba02f4c26b
drm/i915/selftests: Wait for the dma-fence timeout
...
When testing that the timeout fired, we need to be sure we have waited
just long enough for the timeout to have occurred and for the softirq
(on another cpu) to have completed. Sleeping for an arbitrary amount is
prone to error, so wait for the timeout instead and complain if it was
too late.
v2: Use wait_event_timeout to provide an upper bound
v3: Fix inverted check for wait_event_timeout timing out
v4: Restore the check that the fences aren't signalled too early, by
inspecting them before the expected timeout.
References: https://bugs.freedesktop.org/show_bug.cgi?id=104670
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180117135713.2324-1-chris@chris-wilson.co.uk
2018-01-17 17:09:59 +00:00
Maarten Lankhorst
3f5b933e60
drm/i915: Do not WARN_ON with small framebuffers.
...
It's perfectly legal to create a fb with stride < 512, and one of
the kms_plane_scaling subtests creates a very small fb.
Downgrade the WARN_ON to a simple check check, and because this
function is potentially called on every atomic update/pageflip,
downgrade the other WARN_ON to a WARN_ON_ONCE, and do the right
thing here.
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com >
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180116155331.75175-1-maarten.lankhorst@linux.intel.com
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
2018-01-17 10:14:01 +01:00
Maarten Lankhorst
ac25dfed15
drm/i915: Always call to intel_display_set_init_power() in resume_early.
...
intel_power_domains_init_hw() calls set_init_power, but when using
runtime power management this call is skipped. This prevents hw readout
from taking place.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104172
Link: https://patchwork.freedesktop.org/patch/msgid/20180116155324.75120-1-maarten.lankhorst@linux.intel.com
Fixes: bc87229f32 ("drm/i915/skl: enable PC9/10 power states during suspend-to-idle")
Cc: Nivedita Swaminathan <nivedita.swaminathan@intel.com >
Cc: Imre Deak <imre.deak@intel.com >
Cc: Patrik Jakobsson <patrik.jakobsson@linux.intel.com >
Cc: Jani Nikula <jani.nikula@linux.intel.com >
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com >
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com >
Cc: <stable@vger.kernel.org > # v4.5+
Reviewed-by: Imre Deak <imre.deak@intel.com >
2018-01-16 18:50:55 +01:00
Chris Wilson
2ef1e729c7
drm/i915: Rewrite some comments around RCU-deferred object free
...
Tvrtko noticed that the comments describing the interaction of RCU and
the deferred worker for freeing drm_i915_gem_object were a little
confusing, so attempt to bring some sense to them.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com >
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180115205759.13884-1-chris@chris-wilson.co.uk
2018-01-16 10:47:39 +00:00
Chris Wilson
2aa472c827
drm/i915/selftests: Test i915_sw_fence/dma_fence interop
...
Check that we can successfully wait upon a dma_fence using the
i915_sw_fence, including the optional timeout mechanism.
v2: Account for the rounding up of the timeout to the next second.
Unfortunately, the minimum delay is then 1 second.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180115204348.8480-1-chris@chris-wilson.co.uk
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
2018-01-16 10:38:50 +00:00
Chris Wilson
beacbd1615
drm/i915: Use our singlethreaded wq for freeing objects
...
As freeing the objects require serialisation on struct_mutex, we should
prefer to use our singlethreaded driver wq that is dedicated to work
requiring struct_mutex (hence serialised).The benefit should be less
clutter on the system wq, allowing it to make progress even when the
driver/struct_mutex is heavily contended.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Link: https://patchwork.freedesktop.org/patch/msgid/20180115122846.15193-1-chris@chris-wilson.co.uk
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
2018-01-15 20:33:01 +00:00
Ville Syrjälä
4488496d58
drm/i915: Fix deadlock in i830_disable_pipe()
...
i830_disable_pipe() gets called from the power well code, and thus
we're already holding the power domain mutex. That means we can't
call plane->get_hw_state() as it will also try to grab the
same mutex and will thus deadlock.
Replace the assert_plane() calls (which calls ->get_hw_state()) with
just raw register reads in i830_disable_pipe(). As a bonus we can
now get a warning if plane C is enabled even though we don't even
expose it as a drm plane.
v2: Do a separate WARN_ON() for each plane (Chris)
Cc: Chris Wilson <chris@chris-wilson.co.uk >
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk >
Fixes: d87ce76402 ("drm/i915: Add .get_hw_state() method for planes")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20171129125411.29055-1-ville.syrjala@linux.intel.com
(cherry picked from commit 5816d9cbc0 )
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
2018-01-15 16:46:33 +02:00
Ville Syrjälä
23ac127328
drm/i915: Redo plane sanitation during readout
...
Unify the plane disabling during state readout by pulling the code into
a new helper intel_plane_disable_noatomic(). We'll also read out the
state of all planes, so that we know which planes really need to be
diabled.
Additonally we change the plane<->pipe mapping sanitation to work by
simply disabling the offending planes instead of entire pipes. And
we do it before we otherwise sanitize the crtcs, which means we don't
have to worry about misassigned planes during crtc sanitation anymore.
v2: Reoder patches to not depend on enum old_plane_id
v3: s/for_each_pipe/for_each_intel_crtc/
Cc: Thierry Reding <thierry.reding@gmail.com >
Cc: Alex Villacís Lasso <alexvillacislasso@hotmail.com >
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103223
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch >
Tested-by: Thierry Reding <thierry.reding@gmail.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20171117191917.11506-3-ville.syrjala@linux.intel.com
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
(cherry picked from commit b1e01595a6 )
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
2018-01-15 16:45:23 +02:00
Ville Syrjälä
d87ce76402
drm/i915: Add .get_hw_state() method for planes
...
Add a .get_hw_state() method for planes, returning true or false
depending on whether the plane is enabled. Use it to rewrite the
plane enabled/disabled asserts in platform agnostic fashion.
We do lose the pre-gen4 plane<->pipe mapping checks, but since we're
supposed sanitize that anyway it doesn't really matter.
v2: Reoder patches to not depend on enum old_plane_id
Just call assert_plane_disabled() from assert_planes_disabled()
v3: Deal with disabled power wells in .get_hw_state()
v4: Rebase due skl primary plane code removal
Cc: Thierry Reding <thierry.reding@gmail.com >
Cc: Alex Villacís Lasso <alexvillacislasso@hotmail.com >
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch > #v2
Tested-by: Thierry Reding <thierry.reding@gmail.com > #v2
Link: https://patchwork.freedesktop.org/patch/msgid/20171117191917.11506-2-ville.syrjala@linux.intel.com
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
(cherry picked from commit 51f5a09639 )
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
2018-01-15 16:44:51 +02:00
Chris Wilson
99e48bf98d
drm/i915: Lock out execlist tasklet while peeking inside for busy-stats
...
In order to prevent a race condition where we may end up overaccounting
the active state and leaving the busy-stats believing the GPU is 100%
busy, lock out the tasklet while we reconstruct the busy state. There is
no direct spinlock guard for the execlists->port[], so we need to
utilise tasklet_disable() as a synchronous barrier to prevent it, the
only writer to execlists->port[], from running at the same time as the
enable.
Fixes: 4900727d35 ("drm/i915/pmu: Reconstruct active state on starting busy-stats")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180115092041.13509-1-chris@chris-wilson.co.uk
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
2018-01-15 12:18:46 +00:00
Chris Wilson
f255c1e91e
drm/i915/fence: Separate timeout mechanism for awaiting on dma-fences
...
As the timeout mechanism has grown more and more complicated, using
multiple deferred tasks and more than doubling the size of our struct,
split the two implementations to streamline the simpler no-timeout
callback variant.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com >
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180115090643.26696-2-chris@chris-wilson.co.uk
2018-01-15 10:29:18 +00:00
Chris Wilson
c32164b1f6
drm/i915: Only defer freeing of fence callback when also using the timer
...
Without an accompanying timer (for internal fences), we can free the
fence callback immediately as we do not need to employ the RCU barrier
to serialise with the timer. By avoiding the RCU delay, we can avoid the
extra mempressure under heavy inter-engine request utilisation.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com >
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180115090643.26696-1-chris@chris-wilson.co.uk
2018-01-15 10:29:17 +00:00
Dhinakaran Pandiyan
c9ef291a7e
drm/i915/psr: Avoid initializing PSR if there is no sink support.
...
DPCD read for the eDP is complete by the time intel_psr_init() is
called, which means we can avoid initializing PSR structures and state
if there is no sink support.
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com >
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com >
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180103213824.1405-3-dhinakaran.pandiyan@intel.com
2018-01-12 15:34:14 -08:00
Dhinakaran Pandiyan
4371d89601
drm/i915/psr: CAN_PSR() macro to check for PSR source and sink support.
...
The global variable dev_priv->psr.sink_support is set if an eDP sink
supports PSR. Use this instead of redoing the check with is_edp_psr().
Combine source and sink support checks into a macro that can be used to
return early from psr_{invalidate, single_frame_update, flush}.
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com >
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180103213824.1405-2-dhinakaran.pandiyan@intel.com
2018-01-12 15:34:11 -08:00
Dhinakaran Pandiyan
457f1e5f47
drm/i915/psr: Kill psr.source_ok flag.
...
This flag has become redundant since
commit 4d90f2d507 ("drm/i915: Start tracking PSR state in crtc state")
It is set at the same place as psr.enabled, which is also exposed via
debugfs.
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com >
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com >
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com >
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180103213824.1405-1-dhinakaran.pandiyan@intel.com
2018-01-12 15:34:05 -08:00
Tvrtko Ursulin
dd5fec87ef
drm/i915/pmu: Use kcalloc instead of kzalloc
...
kcalloc is preffered for allocating arrays.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com >
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180112170340.5387-2-tvrtko.ursulin@linux.intel.com
2018-01-12 17:40:29 +00:00
Fengguang Wu
4c50123084
drm/i915/pmu: fix noderef.cocci warnings
...
drivers/gpu/drm/i915/i915_pmu.c:795:34-40: ERROR: application of sizeof to pointer
sizeof when applied to a pointer typed expression gives the size of
the pointer
Generated by: scripts/coccinelle/misc/noderef.cocci
Fixes: 109ec55837 ("drm/i915/pmu: Only enumerate available counters in sysfs")
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com >
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180112170340.5387-1-tvrtko.ursulin@linux.intel.com
2018-01-12 17:40:29 +00:00
Chris Wilson
4900727d35
drm/i915/pmu: Reconstruct active state on starting busy-stats
...
We have a hole in our busy-stat accounting if the pmu is enabled during
a long running batch, the pmu will not start accumulating busy-time
until the next context switch. This then fails tests that are only
sampling a single batch.
v2: Count each active port just once (context in/out events are only on
the first and last assignment to a port).
v3: Avoid hardcoding knowledge of 2 submission ports
Fixes: 30e17b7847 ("drm/i915: Engine busy time tracking")
Testcase: igt/perf_pmu/busy-start
Testcase: igt/perf_pmu/busy-double-start
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180111073031.14614-1-chris@chris-wilson.co.uk
2018-01-11 14:57:27 +00:00
Chris Wilson
2bbba4e94e
drm/i915/pmu: Initialise our dynamic sysfs attributes for use with lockdep
...
As we kmalloc our dynamic sysfs attributes, we have to give them an
external static lock_class_key for them to use with lockdep.
Fixes: 109ec55837 ("drm/i915/pmu: Only enumerate available counters in sysfs")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180111140402.3984-1-chris@chris-wilson.co.uk
2018-01-11 14:57:25 +00:00
Tvrtko Ursulin
109ec55837
drm/i915/pmu: Only enumerate available counters in sysfs
...
Switch over to dynamically creating device attributes, which are in turn
used by the perf core to expose available counters in sysfs.
This way we do not expose counters which are not avaiable on the current
platform, and are so more consistent between what we reply to open
attempts via the perf_event_open(2), and what is discoverable in sysfs.
v2:
* Simplify attribute pointer freeing loop.
* Changed attr init from macro to function.
* More common error unwind. (Chris Wilson)
* Rename some locals. (Chris Wilson)
v3:
* Fixed double semi-colon. (Chris Wilson)
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
Cc: Chris Wilson <chris@chris-wilson.co.uk >
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk >
Link: https://patchwork.freedesktop.org/patch/msgid/20180111083525.32394-1-tvrtko.ursulin@linux.intel.com
2018-01-11 09:55:52 +00:00
Tvrtko Ursulin
6e7a3f5244
drm/i915: Apply headless DMC workaround for CNL
...
With firmware 1.07 having fixed the state corruption issue, we can enable
the headless GT performance workaround for CNL as well. (Equivalent to
b68763741a ("drm/i915: Restore GT performance in headless mode with DMC
loaded") on other affected platforms.)
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100572
Testcase: igt/gem_exec_nop/headless
Cc: Imre Deak <imre.deak@intel.com >
Cc: Chris Wilson <chris@chris-wilson.co.uk >
Cc: Dmitry Rogozhkin <dmitry.v.rogozhkin@intel.com >
Reviewed-by: Imre Deak <imre.deak@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180111082417.795-1-tvrtko.ursulin@linux.intel.com
2018-01-11 09:55:27 +00:00
Chris Wilson
5005c85142
drm/i915: Don't adjust priority on an already signaled fence
...
When we retire a signaled fence, we free the dependency tree. However,
we skip clearing the list so that if we then try to adjust the priority
of the signaled fence, we may walk the list of freed dependencies.
[ 3083.156757] ==================================================================
[ 3083.156806] BUG: KASAN: use-after-free in execlists_schedule+0x199/0x660 [i915]
[ 3083.156810] Read of size 8 at addr ffff8806bf20f400 by task Xorg/831
[ 3083.156815] CPU: 0 PID: 831 Comm: Xorg Not tainted 4.15.0-rc6-no-psn+ #1
[ 3083.156817] Hardware name: Notebook N24_25BU/N24_25BU, BIOS 5.12 02/17/2017
[ 3083.156818] Call Trace:
[ 3083.156823] dump_stack+0x5c/0x7a
[ 3083.156827] print_address_description+0x6b/0x290
[ 3083.156830] kasan_report+0x28f/0x380
[ 3083.156872] ? execlists_schedule+0x199/0x660 [i915]
[ 3083.156914] execlists_schedule+0x199/0x660 [i915]
[ 3083.156956] ? intel_crtc_atomic_check+0x146/0x4e0 [i915]
[ 3083.156997] ? execlists_submit_request+0xe0/0xe0 [i915]
[ 3083.157038] ? i915_vma_misplaced.part.4+0x25/0xb0 [i915]
[ 3083.157079] ? __i915_vma_do_pin+0x7c8/0xc80 [i915]
[ 3083.157121] ? intel_atomic_state_alloc+0x44/0x60 [i915]
[ 3083.157130] ? drm_atomic_helper_page_flip+0x3e/0xb0 [drm_kms_helper]
[ 3083.157145] ? drm_mode_page_flip_ioctl+0x7d2/0x850 [drm]
[ 3083.157159] ? drm_ioctl_kernel+0xa7/0xf0 [drm]
[ 3083.157172] ? drm_ioctl+0x45b/0x560 [drm]
[ 3083.157211] i915_gem_object_wait_priority+0x14c/0x2c0 [i915]
[ 3083.157251] ? i915_gem_get_aperture_ioctl+0x150/0x150 [i915]
[ 3083.157290] ? i915_vma_pin_fence+0x1d8/0x320 [i915]
[ 3083.157331] ? intel_pin_and_fence_fb_obj+0x175/0x250 [i915]
[ 3083.157372] ? intel_rotation_info_size+0x60/0x60 [i915]
[ 3083.157413] ? intel_link_compute_m_n+0x80/0x80 [i915]
[ 3083.157428] ? drm_dev_printk+0x1b0/0x1b0 [drm]
[ 3083.157443] ? drm_dev_printk+0x1b0/0x1b0 [drm]
[ 3083.157485] intel_prepare_plane_fb+0x2f8/0x5a0 [i915]
[ 3083.157527] ? intel_crtc_get_vblank_counter+0x80/0x80 [i915]
[ 3083.157536] drm_atomic_helper_prepare_planes+0xa0/0x1c0 [drm_kms_helper]
[ 3083.157587] intel_atomic_commit+0x12e/0x4e0 [i915]
[ 3083.157605] drm_atomic_helper_page_flip+0xa2/0xb0 [drm_kms_helper]
[ 3083.157621] drm_mode_page_flip_ioctl+0x7d2/0x850 [drm]
[ 3083.157638] ? drm_mode_cursor2_ioctl+0x10/0x10 [drm]
[ 3083.157652] ? drm_lease_owner+0x1a/0x30 [drm]
[ 3083.157668] ? drm_mode_cursor2_ioctl+0x10/0x10 [drm]
[ 3083.157681] drm_ioctl_kernel+0xa7/0xf0 [drm]
[ 3083.157696] drm_ioctl+0x45b/0x560 [drm]
[ 3083.157711] ? drm_mode_cursor2_ioctl+0x10/0x10 [drm]
[ 3083.157725] ? drm_getstats+0x20/0x20 [drm]
[ 3083.157729] ? timerqueue_del+0x49/0x80
[ 3083.157732] ? __remove_hrtimer+0x62/0xb0
[ 3083.157735] ? hrtimer_try_to_cancel+0x173/0x210
[ 3083.157738] do_vfs_ioctl+0x13b/0x880
[ 3083.157741] ? ioctl_preallocate+0x140/0x140
[ 3083.157744] ? _raw_spin_unlock_irq+0xe/0x30
[ 3083.157746] ? do_setitimer+0x234/0x370
[ 3083.157750] ? SyS_setitimer+0x19e/0x1b0
[ 3083.157752] ? SyS_alarm+0x140/0x140
[ 3083.157755] ? __rcu_read_unlock+0x66/0x80
[ 3083.157757] ? __fget+0xc4/0x100
[ 3083.157760] SyS_ioctl+0x74/0x80
[ 3083.157763] entry_SYSCALL_64_fastpath+0x1a/0x7d
[ 3083.157765] RIP: 0033:0x7f6135d0c6a7
[ 3083.157767] RSP: 002b:00007fff01451888 EFLAGS: 00003246 ORIG_RAX: 0000000000000010
[ 3083.157769] RAX: ffffffffffffffda RBX: 0000000000000004 RCX: 00007f6135d0c6a7
[ 3083.157771] RDX: 00007fff01451950 RSI: 00000000c01864b0 RDI: 000000000000000c
[ 3083.157772] RBP: 00007f613076f600 R08: 0000000000000001 R09: 0000000000000000
[ 3083.157773] R10: 0000000000000060 R11: 0000000000003246 R12: 0000000000000000
[ 3083.157774] R13: 0000000000000060 R14: 000000000000001b R15: 0000000000000060
[ 3083.157779] Allocated by task 831:
[ 3083.157783] kmem_cache_alloc+0xc0/0x200
[ 3083.157822] i915_gem_request_await_dma_fence+0x2c4/0x5d0 [i915]
[ 3083.157861] i915_gem_request_await_object+0x321/0x370 [i915]
[ 3083.157900] i915_gem_do_execbuffer+0x1165/0x19c0 [i915]
[ 3083.157937] i915_gem_execbuffer2+0x1ad/0x550 [i915]
[ 3083.157950] drm_ioctl_kernel+0xa7/0xf0 [drm]
[ 3083.157962] drm_ioctl+0x45b/0x560 [drm]
[ 3083.157964] do_vfs_ioctl+0x13b/0x880
[ 3083.157966] SyS_ioctl+0x74/0x80
[ 3083.157968] entry_SYSCALL_64_fastpath+0x1a/0x7d
[ 3083.157971] Freed by task 831:
[ 3083.157973] kmem_cache_free+0x77/0x220
[ 3083.158012] i915_gem_request_retire+0x72c/0xa70 [i915]
[ 3083.158051] i915_gem_request_alloc+0x1e9/0x8b0 [i915]
[ 3083.158089] i915_gem_do_execbuffer+0xa96/0x19c0 [i915]
[ 3083.158127] i915_gem_execbuffer2+0x1ad/0x550 [i915]
[ 3083.158140] drm_ioctl_kernel+0xa7/0xf0 [drm]
[ 3083.158153] drm_ioctl+0x45b/0x560 [drm]
[ 3083.158155] do_vfs_ioctl+0x13b/0x880
[ 3083.158156] SyS_ioctl+0x74/0x80
[ 3083.158158] entry_SYSCALL_64_fastpath+0x1a/0x7d
[ 3083.158162] The buggy address belongs to the object at ffff8806bf20f400
which belongs to the cache i915_dependency of size 64
[ 3083.158166] The buggy address is located 0 bytes inside of
64-byte region [ffff8806bf20f400, ffff8806bf20f440)
[ 3083.158168] The buggy address belongs to the page:
[ 3083.158171] page:00000000d43decc4 count:1 mapcount:0 mapping: (null) index:0x0
[ 3083.158174] flags: 0x17ffe0000000100(slab)
[ 3083.158179] raw: 017ffe0000000100 0000000000000000 0000000000000000 0000000180200020
[ 3083.158182] raw: ffffea001afc16c0 0000000500000005 ffff880731b881c0 0000000000000000
[ 3083.158184] page dumped because: kasan: bad access detected
[ 3083.158187] Memory state around the buggy address:
[ 3083.158190] ffff8806bf20f300: fb fb fb fb fb fb fb fb fc fc fc fc fc fc fc fc
[ 3083.158192] ffff8806bf20f380: fb fb fb fb fb fb fb fb fc fc fc fc fc fc fc fc
[ 3083.158195] >ffff8806bf20f400: fb fb fb fb fb fb fb fb fc fc fc fc fc fc fc fc
[ 3083.158196] ^
[ 3083.158199] ffff8806bf20f480: fb fb fb fb fb fb fb fb fc fc fc fc fc fc fc fc
[ 3083.158201] ffff8806bf20f500: fb fb fb fb fb fb fb fb fc fc fc fc fc fc fc fc
[ 3083.158203] ==================================================================
Reported-by: Alexandru Chirvasitu <achirvasub@gmail.com >
Reported-by: Mike Keehan <mike@keehan.net >
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104436
Fixes: 1f181225f8 ("drm/i915/execlists: Keep request->priority for its lifetime")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Cc: Alexandru Chirvasitu <achirvasub@gmail.com >
Cc: Michał Winiarski <michal.winiarski@intel.com >
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com >
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
Tested-by: Alexandru Chirvasitu <achirvasub@gmail.com >
Reviewed-by: Michał Winiarski <michal.winiarski@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180106105618.13532-1-chris@chris-wilson.co.uk
(cherry picked from commit c218ee03b9 )
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
2018-01-11 11:42:53 +02:00
Kenneth Graunke
4636bda86a
drm/i915: Whitelist SLICE_COMMON_ECO_CHICKEN1 on Geminilake.
...
Geminilake requires the 3D driver to select whether barriers are
intended for compute shaders, or tessellation control shaders, by
whacking a "Barrier Mode" bit in SLICE_COMMON_ECO_CHICKEN1 when
switching pipelines. Failure to do this properly can result in GPU
hangs.
Unfortunately, this means it needs to switch mid-batch, so only
userspace can properly set it. To facilitate this, the kernel needs
to whitelist the register.
The workarounds page currently tags this as applying to Broxton only,
but that doesn't make sense. The documentation for the register it
references says the bit userspace is supposed to toggle only exists on
Geminilake. Empirically, the Mesa patch to toggle this bit appears to
fix intermittent GPU hangs in tessellation control shader barrier tests
on Geminilake; we haven't seen those hangs on Broxton.
v2: Mention WA #0862 in the comment (it doesn't have a name).
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org >
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Cc: stable@vger.kernel.org
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180105085905.9298-1-kenneth@whitecape.org
(cherry picked from commit ab062639ed )
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
2018-01-11 11:42:47 +02:00