Rodrigo Vivi
c4932d7956
drm/i915/psr: Don't avoid PSR when PSR2 conditions are not met.
...
We can still use PSR1 when PSR2 conditions are not met.
So, let's split the check in a way that we make sure has_psr
gets set independently of PSR2 criteria.
v2: Duh! Handle proper return to avoid breaking PSR2.
v3: (DK):
- better name for psr2 conditions check function
- Don't remove FIXME block and psr2.support check.
- Add a debug message to show us what PSR or PSR2 is
getting enabled now we have ways to enabled PSR on
PSR2 panels.
- s/PSR2 disabled/PSR2 not enabled
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com >
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180227212913.14083-2-rodrigo.vivi@intel.com
2018-02-27 15:54:17 -08:00
Rodrigo Vivi
8cef3e5c0d
drm/i915/psr2: Fix max resolution supported.
...
According to spec:
"PSR2 is supported for pipe active sizes up to
3640 pixels wide and 2304 lines tall."
BSpec: 7713
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com >
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180227212913.14083-1-rodrigo.vivi@intel.com
2018-02-27 15:54:12 -08:00
Dhinakaran Pandiyan
06d058e1a0
drm/i915/psr: Check for power state control capability.
...
eDP spec says - "If PSR/PSR2 is supported, the SET_POWER_CAPABLE bit in the
EDP_GENERAL_CAPABILITY_1 register (DPCD Address 00701h, bit d7) must be set
to 1."
Reject PSR on panels without this cap bit set as such panels cannot be
controlled via SET_POWER & SET_DP_PWR_VOLTAGE register and the DP source
needs to be able to do that for PSR.
Thanks to Nathan for debugging this.
Panel cap checks like this can be done just once, let's fix this
when PSR dpcd init movement lands.
Cc: Nathan D Ciobanu <nathan.d.ciobanu@intel.com >
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com >
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com >
Tested-by: Nathan Ciobanu <nathan.d.ciobanu@linux.intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180227032723.15474-1-dhinakaran.pandiyan@intel.com
2018-02-27 12:28:10 -08:00
Dhinakaran Pandiyan
3975f0aaa3
drm/i915/dp: Move comment about hw timeout to the right place.
...
No functional change.
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com >
Reviewed-by: David Weinehall <david.weinehall@linux.intel.com >
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180223221520.18464-6-dhinakaran.pandiyan@intel.com
2018-02-27 12:06:37 -08:00
Dhinakaran Pandiyan
62d5ac27f4
drm/i915/dp: Remove redundant sleep after AUX transaction length check.
...
The core already takes care of the delay before retrying. The delay now
changes to (500, 600)us instead of (500 + 1000, 600 + 1500)us.
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com >
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com >
Reviewed-by: David Weinehall <david.weinehall@linux.intel.com >
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180223221520.18464-5-dhinakaran.pandiyan@intel.com
2018-02-27 12:06:34 -08:00
Dhinakaran Pandiyan
e2770e2e05
drm/i915/psr: Check for the specific AUX_FRAME_SYNC cap bit.
...
The cap check should be specifically for bit 0 instead of any bit.
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com >
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Fixes: 474d1ec4a3 ("drm/i915/skl: Enabling PSR2 SU with frame sync")
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180223221520.18464-4-dhinakaran.pandiyan@intel.com
2018-02-27 12:06:26 -08:00
Dhinakaran Pandiyan
77fe36ff04
drm/i915/psr: Extract PSR DPCD initialization and move it to intel_psr.c
...
intel_edp_init_dpcd() is cluttered with PSR specific DPCD checks and
intel_dp.c is huge.
No functional change intended.
v2: Rebased.
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com >
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com >
Reviewed-by: David Weinehall <david.weinehall@linux.intel.com >
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180223221520.18464-3-dhinakaran.pandiyan@intel.com
2018-02-27 12:06:09 -08:00
Dhinakaran Pandiyan
51e98eb851
drm/i915/frontbuffer: Mark frontbuffer flush and invalidate with might_sleep()
...
Frontbuffer flush and invalidate call psr, fbc and drrs functions that use
mutexes but they can be called in atomic contexts in the fbdev path. The
point where the spinlocks are acquired is up in the call stack that is not
entirely easy to spot, so annotate with might_sleep().
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com >
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180223221520.18464-2-dhinakaran.pandiyan@intel.com
2018-02-27 12:06:07 -08:00
Dhinakaran Pandiyan
b891d5e46c
drm/i915/psr: New power domain for AUX IO.
...
PSR on CNL requires AUX IO wells to be kept on and the existing AUX domain
for AUX-A enables DC_OFF well too. This is not required, so add a new
AUX_IO_A domain for AUX-A to allow DC states to remain enabled. Other AUX
channels re-use the existing AUX domains.
v4: Reword comment (Rodrigo and Ville)
Rename _get and _put functions to include aux_io substring(Rodrigo)
Remove unnecessary diff that got included.
v3: Extract aux domain selection into a function (Ville)
v2: Add AUX IO domain only for AUX-A
Rebased on top of Ville's AUX series.
Cc: Imre Deak <imre.deak@intel.com >
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com >
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com >
Suggested-by: Imre Deak <imre.deak@intel.com >
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180223221520.18464-1-dhinakaran.pandiyan@intel.com
2018-02-27 12:05:43 -08:00
Michał Winiarski
5028a4fb7d
drm/i915/guc: Fill preempt context once at init time
...
Since we're inhibiting context save of preempt context, we're no longer
tracking the position of HEAD/TAIL. With GuC, we're adding a new
breadcrumb for each preemption, which means that the HW will do more and
more breadcrumb writes. Eventually the ring is filled, and we're
submitting the preemption context with HEAD==TAIL==0, which won't result
in breadcrumb write, but will trigger hangcheck instead.
Instead of writing a new preempt breadcrumb for each preemption, let's
just fill the ring once at init time (which also saves a couple of
instructions in the tasklet).
v2: Assert that context save restore is inhibited, don't assert on ring
alignment. (Chris)
v3: Cleanup checkpatch.
Fixes: 517aaffe0c ("drm/i915/execlists: Inhibit context save/restore for the fake preempt context")
Signed-off-by: Michał Winiarski <michal.winiarski@intel.com >
Cc: Chris Wilson <chris@chris-wilson.co.uk >
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com >
Cc: Michel Thierry <michel.thierry@intel.com >
Cc: Mika Kuoppala <mika.kuoppala@intel.com >
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180226163800.21745-1-michal.winiarski@intel.com
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk >
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
2018-02-27 10:30:12 +00:00
Manasi Navare
ba1c06a572
drm/i915/dp: Fix the order of platforms for setting DP source rates
...
The usual if ladder order should be from newest to oldest
platform. However the CNL conditional statement was misplaced.
This patch sets the DP source for platforms starting from the newest
to oldest.
Suggested-by: Jani Nikula <jani.nikula@linux.intel.com >
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com >
Cc: Jani Nikula <jani.nikula@linux.intel.com >
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com >
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/1519701075-9894-1-git-send-email-manasi.d.navare@intel.com
2018-02-27 11:58:14 +02:00
Rodrigo Siqueira
dbe37dc31c
drm/virtio: Add spaces around operators
...
This patch fixes the checkpatch.pl check:
virtgpu_ioctl.c:535: CHECK: spaces preferred around that '|' (ctx:VxV)
virtgpu_vq.c:277: CHECK: spaces preferred around that '+' (ctx:VxV)
...
Signed-off-by: Rodrigo Siqueira <rodrigosiqueiramelo@gmail.com >
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org >
Link: http://patchwork.freedesktop.org/patch/msgid/8402b55696b44483ba2e1f6aaeb53bf709ffbfe7.1519343668.git.rodrigosiqueiramelo@gmail.com
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com >
2018-02-27 08:40:42 +01:00
Rodrigo Siqueira
601030e262
drm/virtio: Remove multiple blank lines
...
This patch fixes the checkpatch.pl check:
virtgpu_drv.c:116: CHECK: Please don't use multiple blank lines
virtgpu_vq.c:599: CHECK: Please don't use multiple blank lines
virtgpu_prime.c:42: CHECK: Please don't use multiple blank lines
Signed-off-by: Rodrigo Siqueira <rodrigosiqueiramelo@gmail.com >
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org >
Link: http://patchwork.freedesktop.org/patch/msgid/c43a006f2ed93a16fe824b4a2686a2d5e2ef56f5.1519343668.git.rodrigosiqueiramelo@gmail.com
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com >
2018-02-27 08:40:42 +01:00
Rodrigo Siqueira
dc31b3b76c
drm/virtio: Replace 'unsigned' for 'unsigned int'
...
This patch fixes the checkpatch.pl warning:
drivers/gpu/drm/virtio/virtgpu_display.c:64: WARNING: Prefer 'unsigned
int' to bare use of 'unsigned'
...
Signed-off-by: Rodrigo Siqueira <rodrigosiqueiramelo@gmail.com >
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org >
Link: http://patchwork.freedesktop.org/patch/msgid/ac9c4110785e6519801d44c57d4f05c3e0cdad53.1519343668.git.rodrigosiqueiramelo@gmail.com
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com >
2018-02-27 08:40:41 +01:00
Rodrigo Siqueira
1a5019f125
drm/virtio: Remove return from void function
...
This patch fixes the checkpatch.pl warning:
virtgpu_ttm.c:181: WARNING: void function return statements are not
generally useful
...
Signed-off-by: Rodrigo Siqueira <rodrigosiqueiramelo@gmail.com >
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org >
Link: http://patchwork.freedesktop.org/patch/msgid/fd8dc6599c81c7aec6753c8552c1cabb7baa7577.1519343668.git.rodrigosiqueiramelo@gmail.com
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com >
2018-02-27 08:40:40 +01:00
Rodrigo Siqueira
5d883850dc
drm/virtio: Add */ in block comments to separate line
...
This patch fixes the checkpatch.pl warning:
virtgpu_ioctl.c:551: WARNING: Block comments use a trailing */ on a
separate line
...
Signed-off-by: Rodrigo Siqueira <rodrigosiqueiramelo@gmail.com >
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org >
Link: http://patchwork.freedesktop.org/patch/msgid/f0bd4104a7d26bf7561c3a2b4632041c5411f1f2.1519343668.git.rodrigosiqueiramelo@gmail.com
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com >
2018-02-27 08:40:39 +01:00
Rodrigo Siqueira
9d492b6bec
drm/virtio: Add blank line after variable declarations
...
This patch fixes the checkpatch.pl warnings:
virtgpu_drv.c:57: WARNING: Missing a blank line after declarations
virtgpu_display.c:99: WARNING: Missing a blank line after declarations
...
Signed-off-by: Rodrigo Siqueira <rodrigosiqueiramelo@gmail.com >
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org >
Link: http://patchwork.freedesktop.org/patch/msgid/41767852ff9dc584c825e32db6222b9a311603b9.1519343668.git.rodrigosiqueiramelo@gmail.com
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com >
2018-02-27 08:40:37 +01:00
Rodrigo Siqueira
1858b85606
drm/virtio: Add tabs at the start of a line
...
This patch fixes the checkpatch.pl errors:
drivers/gpu/drm/virtio/virtgpu_drv.h:371: ERROR: code indent should use
tabs where possible
...
Signed-off-by: Rodrigo Siqueira <rodrigosiqueiramelo@gmail.com >
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org >
Link: http://patchwork.freedesktop.org/patch/msgid/1c77c233d4454ee2bdb85beaf17d413e310fac0a.1519343668.git.rodrigosiqueiramelo@gmail.com
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com >
2018-02-27 08:40:35 +01:00
Dave Airlie
9a191b1149
virtio-gpu: fix ioctl and expose the fixed status to userspace.
...
This exposes to mesa that it can use the fixed ioctl for querying
later cap sets, cap set 1 is forever frozen in time.
Signed-off-by: Dave Airlie <airlied@redhat.com >
Link: http://patchwork.freedesktop.org/patch/msgid/20180221015003.22884-1-airlied@gmail.com
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com >
2018-02-27 08:37:58 +01:00
Alex Deucher
2e7cbbbcf9
drm/amdgpu/powerplay/smu7: use proper dep table for mclk
...
For mclk od, use the vdd dependency on mclk table. Looks
like a cut and paste typo.
Reviewed-by: Rex Zhu<rezhu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-26 23:09:47 -05:00
Tom St Denis
585b7f161c
drm/amd/amdgpu: Correct VRAM width for APUs with GMC9
...
DDR4 has a 64-bit width not 128-bits. It was reporting
twice the width. Tested with my Ryzen 2400G.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-26 23:09:47 -05:00
Christian König
45a9d154f6
drm/ttm: cleanup ttm_tt_create
...
Cleanup ttm_tt_create a bit.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com >
Reviewed-by: Roger He <Hongbo.He@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-26 23:09:46 -05:00
Christian König
97b7e1b8b5
drm/ttm: move ttm_tt_create into ttm_tt.c v2
...
Rename ttm_bo_add_ttm to ttm_tt_create and move it into ttm_tt.c.
v2: separate the cleanup.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com >
Reviewed-by: Roger He <Hongbo.He@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-26 23:09:46 -05:00
Roger He
ec3fe391bd
drm/ttm: check if free mem space is under the lower limit
...
the free mem space and the lower limit both include two parts:
system memory and swap space.
For the OOM triggered by TTM, that is the case as below:
first swap space is full of swapped out pages and soon
system memory also is filled up with ttm pages. and then
any memory allocation request will run into OOM.
to cover two cases:
a. if no swap disk at all or free swap space is under swap mem
limit but available system mem is bigger than sys mem limit,
allow TTM allocation;
b. if the available system mem is less than sys mem limit but
free swap space is bigger than swap mem limit, allow TTM
allocation.
v2: merge two memory limit(swap and system) into one
v3: keep original behavior except ttm_opt_ctx->flags with
TTM_OPT_FLAG_FORCE_ALLOC
v4: always set force_alloc as tx->flags & TTM_OPT_FLAG_FORCE_ALLOC
v5: add an attribute for lower_mem_limit
v6: set lower_mem_limit as 0 to keep original behavior
Signed-off-by: Roger He <Hongbo.He@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-26 23:09:46 -05:00
Christian König
724daa4fd6
drm/ttm: drop persistent_swap_storage from ttm_bo_init and co
...
Never used as parameter, the only driver actually using this is nouveau
and there it is initialized after the BO is initialized.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-26 23:09:45 -05:00
Christian König
231cdafc75
drm/ttm: drop ttm->dummy_read_page
...
Only used by the AGP backend and there it can be easily accessed using
ttm->bdev->glob.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-26 23:09:45 -05:00
Christian König
3231a7696e
drm/ttm: drop ttm->glob
...
The pointer is available as ttm->bdev->glob as well.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-26 23:09:45 -05:00
Christian König
3839263362
drm/ttm: drop bo->glob
...
The pointer is available as bo->bdev->glob as well.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-26 23:09:44 -05:00
Christian König
95bbb6d35d
drm/bochs: remove the default ttm_tt_populate callbacks
...
TTM calls the default implementation now.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-26 23:09:44 -05:00
Christian König
e55b33f8ab
drm/cirrus: remove ttm_pool_* wrappers
...
TTM calls the default implementation now.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-26 23:09:43 -05:00
Christian König
2a7b464f84
drm/qxl: remove ttm_pool_* wrappers
...
TTM calls the default implementation now.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-26 23:09:43 -05:00
Christian König
a29f0ca0c9
drm/ast: remove ttm_pool_* wrappers
...
TTM calls the default implementation now.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-26 23:09:42 -05:00
Christian König
401fedc218
drm/hisilicon: remove ttm_pool_* wrappers
...
TTM calls the default implementation now.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-26 23:09:42 -05:00
Christian König
b31925a83f
drm/mgag200: remove ttm_pool_* wrappers
...
TTM calls the default implementation now.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-26 23:09:42 -05:00
Christian König
b3afc7989f
drm/virtio: remove ttm_pool_* wrappers
...
TTM calls the default implementation now.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-26 23:09:41 -05:00
Christian König
e44fcf71f4
drm/ttm: add default implementations for ttm_tt_(un)populate
...
Use ttm_pool_populate/ttm_pool_unpopulate if the driver doesn't provide
a function.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-26 23:09:41 -05:00
Rex Zhu
cd277585d6
drm/amd/pp: Move common dpm check functions to hardwaremanager.c
...
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-26 23:09:41 -05:00
Rex Zhu
e21148ecba
drm/amd/pp: Cleaning up vega10_enable_dpm_tasks function
...
1. move display num initialize out of dpm enable tasks.
2. do not set/restore smc telemetry if dpm is runing.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-26 23:09:40 -05:00
Rex Zhu
af264d0245
drm/amd/pp: Refine code in powerplay for Cz/Vega10
...
Add dpm check functions on CZ/Vega10 to smu backend
function table.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-26 23:09:40 -05:00
Rex Zhu
d246cd53fd
drm/amd/pp: Remove dead error checking code on Vega10
...
when smu failed, print out the error info immediately
for debug. smum_send_msg_to_smu always return true,
so no need to check return value.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-26 23:09:40 -05:00
Rex Zhu
baeb7721b1
drm/amd/pp: Add debug info when smu failed on Vega10
...
When smu msssage failed, print out return value in dmesg.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-26 23:09:39 -05:00
Rex Zhu
bd58c48c10
drm/amd/pp: Remove duplicated vega10_is_smc_ram_running calls
...
Avoid conflicts in reading the same register mmPCIE_INDEX2
with other clients
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-26 23:09:39 -05:00
Corentin Labbe
103a4b1d48
drm/amd: Remove inclusion of non-existing include directories
...
This patch fix the following build warnings:
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_drv.o
cc1: warning: ../display/: No such file or directory [-Wmissing-include-dirs]
cc1: warning: ../display/include: No such file or directory [-Wmissing-include-dirs]
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_device.o
cc1: warning: ../display/: No such file or directory [-Wmissing-include-dirs]
cc1: warning: ../display/include: No such file or directory [-Wmissing-include-dirs]
[...]
This warning is shown for each file in amdgpu directory, so it spams a lot.
Acked-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Corentin Labbe <clabbe@baylibre.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-26 23:09:38 -05:00
Corentin Labbe
fbb3156218
drm/amd: remove inclusion of non-existing scheduler directory
...
The scheduler directory was removed via commit 1b1f42d8fd ("drm: move amd_gpu_scheduler into common location")
Remove it from include path.
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Corentin Labbe <clabbe@baylibre.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-26 23:09:38 -05:00
Ben Crocker
bcb0b981c5
drm/radeon: insist on 32-bit DMA for Cedar on PPC64/PPC64LE
...
In radeon_device_init, set the need_dma32 flag for Cedar chips
(e.g. FirePro 2270). This fixes, or at least works around, a bug
on PowerPC exposed by last year's commits
8e3f1b1d82 (Russell Currey)
and
253fd51e2f (Alistair Popple)
which enabled the 64-bit DMA iommu bypass.
This caused the device to freeze, in some cases unrecoverably, and is
the subject of several bug reports internal to Red Hat.
Signed-off-by: Ben Crocker <bcrocker@redhat.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
Cc: stable@vger.kernel.org
2018-02-26 23:09:38 -05:00
Thierry Reding
421334a847
drm/amdgpu: Remove duplicate setting of ->need_swiotlb
...
There's no need to set this before the number of DMA bits has been
properly determined.
Signed-off-by: Thierry Reding <treding@nvidia.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-26 23:09:37 -05:00
Rex Zhu
3214e02199
drm/amd/pp: Add a pp feature mask bit for AutoWattman feature
...
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-26 23:09:37 -05:00
Rex Zhu
3d2fc0813f
drm/amdgpu: Change default value of module parameter amdgpu_pp_feature_mask
...
Currently all pp features are enabled by default except
OVERDRIVE
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-26 23:09:37 -05:00
Eric Huang
472c89fcd5
drm/amd/powerplay: fix thermal interrupts on vega10
...
a bug in programming thermal interrupt register masks out
interrupts and driver cannot receive interrupts. Setting
0 to mask bits will fix it.
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com >
Acked-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-26 23:09:36 -05:00
Rex Zhu
eda9a4eb15
drm/amdgpu: Add query vram width in CGS query system info
...
powerplay need vram width to set default mclk optimization
settings(uphyst/downhyst/activity threshold)
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-26 23:09:36 -05:00