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GICv5 systems will likely not support the full set of PPIs. The presence of any virtual PPI is tied to the presence of the physical PPI. Therefore, the available PPIs will be limited by the physical host. Userspace cannot drive any PPIs that are not implemented. Moreover, it is not desirable to expose all PPIs to the guest in the first place, even if they are supported in hardware. Some devices, such as the arch timer, are implemented in KVM, and hence those PPIs shouldn't be driven by userspace, either. Provided a new UAPI: KVM_DEV_ARM_VGIC_GRP_CTRL => KVM_DEV_ARM_VGIC_USERPSPACE_PPIs This allows userspace to query which PPIs it is able to drive via KVM_IRQ_LINE. Additionally, introduce a check in kvm_vm_ioctl_irq_line() to reject any PPIs not in the userspace mask. Signed-off-by: Sascha Bischoff <sascha.bischoff@arm.com> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com> Link: https://patch.msgid.link/20260319154937.3619520-40-sascha.bischoff@arm.com Signed-off-by: Marc Zyngier <maz@kernel.org>
51 lines
2.0 KiB
ReStructuredText
51 lines
2.0 KiB
ReStructuredText
.. SPDX-License-Identifier: GPL-2.0
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====================================================
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ARM Virtual Generic Interrupt Controller v5 (VGICv5)
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====================================================
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Device types supported:
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- KVM_DEV_TYPE_ARM_VGIC_V5 ARM Generic Interrupt Controller v5.0
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Only one VGIC instance may be instantiated through this API. The created VGIC
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will act as the VM interrupt controller, requiring emulated user-space devices
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to inject interrupts to the VGIC instead of directly to CPUs.
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Creating a guest GICv5 device requires a host GICv5 host. The current VGICv5
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device only supports PPI interrupts. These can either be injected from emulated
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in-kernel devices (such as the Arch Timer, or PMU), or via the KVM_IRQ_LINE
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ioctl.
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Groups:
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KVM_DEV_ARM_VGIC_GRP_CTRL
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Attributes:
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KVM_DEV_ARM_VGIC_CTRL_INIT
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request the initialization of the VGIC, no additional parameter in
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kvm_device_attr.addr. Must be called after all VCPUs have been created.
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KVM_DEV_ARM_VGIC_USERPSPACE_PPIs
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request the mask of userspace-drivable PPIs. Only a subset of the PPIs can
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be directly driven from userspace with GICv5, and the returned mask
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informs userspace of which it is allowed to drive via KVM_IRQ_LINE.
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Userspace must allocate and point to __u64[2] of data in
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kvm_device_attr.addr. When this call returns, the provided memory will be
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populated with the userspace PPI mask. The lower __u64 contains the mask
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for the lower 64 PPIS, with the remaining 64 being in the second __u64.
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This is a read-only attribute, and cannot be set. Attempts to set it are
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rejected.
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Errors:
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======= ========================================================
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-ENXIO VGIC not properly configured as required prior to calling
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this attribute
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-ENODEV no online VCPU
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-ENOMEM memory shortage when allocating vgic internal data
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-EFAULT Invalid guest ram access
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-EBUSY One or more VCPUS are running
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======= ========================================================
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