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79dd4f2f40
Carve out space in the RISC-V architecture-specific thread struct for cfi status and shadow stack in usermode. This patch: - defines a new structure cfi_status with status bit for cfi feature - defines shadow stack pointer, base and size in cfi_status structure - defines offsets to new member fields in thread in asm-offsets.c - saves and restores shadow stack pointer on trap entry (U --> S) and exit (S --> U) Shadow stack save/restore is gated on feature availability and is implemented using alternatives. CSR_SSP can be context-switched in 'switch_to' as well, but as soon as kernel shadow stack support gets rolled in, the shadow stack pointer will need to be switched at trap entry/exit point (much like 'sp'). It can be argued that a kernel using a shadow stack deployment scenario may not be as prevalent as user mode using this feature. But even if there is some minimal deployment of kernel shadow stack, that means that it needs to be supported. Thus save/restore of shadow stack pointer is implemented in entry.S instead of in 'switch_to.h'. Reviewed-by: Charlie Jenkins <charlie@rivosinc.com> Reviewed-by: Zong Li <zong.li@sifive.com> Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com> Signed-off-by: Deepak Gupta <debug@rivosinc.com> Tested-by: Andreas Korb <andreas.korb@aisec.fraunhofer.de> # QEMU, custom CVA6 Tested-by: Valentin Haudiquet <valentin.haudiquet@canonical.com> Link: https://patch.msgid.link/20251112-v5_user_cfi_series-v23-5-b55691eacf4f@rivosinc.com [pjw@kernel.org: cleaned up patch description] Signed-off-by: Paul Walmsley <pjw@kernel.org>
128 lines
3.4 KiB
C
128 lines
3.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2009 Chen Liqin <liqin.chen@sunplusct.com>
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* Copyright (C) 2012 Regents of the University of California
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* Copyright (C) 2017 SiFive
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*/
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#ifndef _ASM_RISCV_THREAD_INFO_H
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#define _ASM_RISCV_THREAD_INFO_H
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#include <asm/page.h>
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#include <linux/const.h>
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#include <linux/sizes.h>
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/* thread information allocation */
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#ifdef CONFIG_KASAN
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#define KASAN_STACK_ORDER 1
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#else
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#define KASAN_STACK_ORDER 0
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#endif
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#define THREAD_SIZE_ORDER (CONFIG_THREAD_SIZE_ORDER + KASAN_STACK_ORDER)
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#define THREAD_SIZE (PAGE_SIZE << THREAD_SIZE_ORDER)
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/*
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* By aligning VMAP'd stacks to 2 * THREAD_SIZE, we can detect overflow by
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* checking sp & (1 << THREAD_SHIFT), which we can do cheaply in the entry
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* assembly.
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*/
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#ifdef CONFIG_VMAP_STACK
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#define THREAD_ALIGN (2 * THREAD_SIZE)
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#else
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#define THREAD_ALIGN THREAD_SIZE
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#endif
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#define THREAD_SHIFT (PAGE_SHIFT + THREAD_SIZE_ORDER)
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#define OVERFLOW_STACK_SIZE SZ_4K
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#define IRQ_STACK_SIZE THREAD_SIZE
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#ifndef __ASSEMBLER__
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#include <asm/processor.h>
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#include <asm/csr.h>
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/*
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* low level task data that entry.S needs immediate access to
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* - this struct should fit entirely inside of one cache line
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* - if the members of this struct changes, the assembly constants
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* in asm-offsets.c must be updated accordingly
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* - thread_info is included in task_struct at an offset of 0. This means that
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* tp points to both thread_info and task_struct.
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*/
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struct thread_info {
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unsigned long flags; /* low level flags */
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int preempt_count; /* 0=>preemptible, <0=>BUG */
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/*
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* These stack pointers are overwritten on every system call or
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* exception. SP is also saved to the stack it can be recovered when
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* overwritten.
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*/
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long kernel_sp; /* Kernel stack pointer */
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long user_sp; /* User stack pointer */
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int cpu;
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unsigned long syscall_work; /* SYSCALL_WORK_ flags */
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#ifdef CONFIG_SHADOW_CALL_STACK
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void *scs_base;
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void *scs_sp;
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#endif
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#ifdef CONFIG_64BIT
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/*
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* Used in handle_exception() to save a0, a1 and a2 before knowing if we
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* can access the kernel stack.
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*/
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unsigned long a0, a1, a2;
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#endif
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#ifdef CONFIG_RISCV_USER_CFI
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struct cfi_state user_cfi_state;
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#endif
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};
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#ifdef CONFIG_SHADOW_CALL_STACK
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#define INIT_SCS \
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.scs_base = init_shadow_call_stack, \
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.scs_sp = init_shadow_call_stack,
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#else
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#define INIT_SCS
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#endif
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/*
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* macros/functions for gaining access to the thread information structure
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*
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* preempt_count needs to be 1 initially, until the scheduler is functional.
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*/
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#define INIT_THREAD_INFO(tsk) \
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{ \
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.flags = 0, \
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.preempt_count = INIT_PREEMPT_COUNT, \
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INIT_SCS \
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}
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void arch_release_task_struct(struct task_struct *tsk);
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int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src);
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#endif /* !__ASSEMBLER__ */
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/*
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* thread information flags
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* - these are process state flags that various assembly files may need to
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* access
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* - pending work-to-be-done flags are in lowest half-word
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* - other flags in upper half-word(s)
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*/
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/*
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* Tell the generic TIF infrastructure which bits riscv supports
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*/
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#define HAVE_TIF_NEED_RESCHED_LAZY
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#define HAVE_TIF_RESTORE_SIGMASK
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#include <asm-generic/thread_info_tif.h>
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#define TIF_32BIT 16 /* compat-mode 32bit process */
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#define TIF_RISCV_V_DEFER_RESTORE 17 /* restore Vector before returing to user */
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#define _TIF_RISCV_V_DEFER_RESTORE BIT(TIF_RISCV_V_DEFER_RESTORE)
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#endif /* _ASM_RISCV_THREAD_INFO_H */
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