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Two new 32bit SoC were added, the rv1126 and rk3128. New boards are thr rk3128-eval-board, and a number of rv1126-based compute modules from Edgeble AI. Also included are some dt-binding improvements with relevant Acks from maintainers when the changes touch these areas. * tag 'v6.3-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: dt-bindings: phy: rename phy-rockchip-inno-usb2.yaml dt-bindings: soc: rockchip: grf: add rockchip,rk3288-dp-phy.yaml dt-bindings: phy: rockchip: convert rockchip-dp-phy.txt to yaml ARM: dts: rockchip: Enable Ethernet on rv1126 Neu2-IO ARM: dts: rockchip: Add Ethernet GMAC node for RV1126 ARM: dts: rockchip: Add ethernet rgmiim1 pin-control for rv1126 dt-bindings: arm: rockchip: Add Edgeble Neural Compute Module 6 ARM: dts: rockchip: add brcmf node to rk3066a-mk808 ARM: dts: rockchip: add space between label and nodename nfc pinctrl on rk3128 ARM: dts: rockchip: add rk3128-evb ARM: dts: rockchip: add rk3128 soc dtsi dt-bindings: arm: rockchip: Add Rockchip RK3128 Evaluation board ARM: dts: rockchip: Add Edgeble Neural Compute Module 2(Neu2) IO board ARM: dts: rockchip: Add Edgeble RV1126 Neural Compute Module 2(Neu2) dt-bindings: arm: rockchip: Add Edgeble Neural Compute Module 2 dt-bindings: vendor-prefixes: Add Edgeble AI Technologies Pvt. Ltd. ARM: dts: rockchip: Add Rockchip RV1126 SoC ARM: dts: rockchip: Add Rockchip RV1126 pinctrl dt-bindings: arm: rockchip: Add pmu compatible for rv1126 Link: https://lore.kernel.org/r/5651506.31r3eYUQgx@phil Signed-off-by: Arnd Bergmann <arnd@arndb.de>
286 lines
7.1 KiB
YAML
286 lines
7.1 KiB
YAML
# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/soc/rockchip/grf.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Rockchip General Register Files (GRF)
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maintainers:
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- Heiko Stuebner <heiko@sntech.de>
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properties:
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compatible:
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oneOf:
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- items:
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- enum:
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- rockchip,rk3288-sgrf
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- rockchip,rk3566-pipe-grf
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- rockchip,rk3568-pcie3-phy-grf
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- rockchip,rk3568-pipe-grf
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- rockchip,rk3568-pipe-phy-grf
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- rockchip,rk3568-usb2phy-grf
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- rockchip,rk3588-bigcore0-grf
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- rockchip,rk3588-bigcore1-grf
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- rockchip,rk3588-ioc
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- rockchip,rk3588-php-grf
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- rockchip,rk3588-sys-grf
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- rockchip,rk3588-pcie3-phy-grf
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- rockchip,rk3588-pcie3-pipe-grf
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- rockchip,rv1108-usbgrf
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- const: syscon
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- items:
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- enum:
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- rockchip,px30-grf
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- rockchip,px30-pmugrf
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- rockchip,px30-usb2phy-grf
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- rockchip,rk3036-grf
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- rockchip,rk3066-grf
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- rockchip,rk3128-grf
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- rockchip,rk3188-grf
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- rockchip,rk3228-grf
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- rockchip,rk3288-grf
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- rockchip,rk3308-core-grf
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- rockchip,rk3308-detect-grf
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- rockchip,rk3308-grf
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- rockchip,rk3308-usb2phy-grf
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- rockchip,rk3328-grf
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- rockchip,rk3328-usb2phy-grf
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- rockchip,rk3368-grf
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- rockchip,rk3368-pmugrf
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- rockchip,rk3399-grf
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- rockchip,rk3399-pmugrf
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- rockchip,rk3568-grf
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- rockchip,rk3568-pmugrf
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- rockchip,rv1108-grf
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- rockchip,rv1108-pmugrf
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- rockchip,rv1126-grf
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- rockchip,rv1126-pmugrf
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- const: syscon
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- const: simple-mfd
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reg:
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maxItems: 1
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"#address-cells":
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const: 1
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"#size-cells":
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const: 1
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required:
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- compatible
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- reg
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additionalProperties:
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type: object
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allOf:
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- if:
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properties:
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compatible:
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contains:
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const: rockchip,px30-grf
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then:
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properties:
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lvds:
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description:
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Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt
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- if:
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properties:
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compatible:
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contains:
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const: rockchip,rk3288-grf
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then:
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properties:
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edp-phy:
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type: object
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$ref: /schemas/phy/rockchip,rk3288-dp-phy.yaml#
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unevaluatedProperties: false
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- if:
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properties:
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compatible:
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contains:
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enum:
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- rockchip,rk3066-grf
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- rockchip,rk3188-grf
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- rockchip,rk3288-grf
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then:
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properties:
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usbphy:
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type: object
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$ref: "/schemas/phy/rockchip-usb-phy.yaml#"
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unevaluatedProperties: false
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- if:
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properties:
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compatible:
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contains:
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const: rockchip,rk3328-grf
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then:
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properties:
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gpio:
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type: object
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$ref: "/schemas/gpio/rockchip,rk3328-grf-gpio.yaml#"
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unevaluatedProperties: false
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power-controller:
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type: object
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$ref: "/schemas/power/rockchip,power-controller.yaml#"
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unevaluatedProperties: false
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- if:
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properties:
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compatible:
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contains:
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const: rockchip,rk3399-grf
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then:
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properties:
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mipi-dphy-rx0:
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type: object
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$ref: "/schemas/phy/rockchip-mipi-dphy-rx0.yaml#"
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unevaluatedProperties: false
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pcie-phy:
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description:
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Documentation/devicetree/bindings/phy/rockchip-pcie-phy.txt
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patternProperties:
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"phy@[0-9a-f]+$":
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description:
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Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt
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- if:
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properties:
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compatible:
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contains:
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enum:
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- rockchip,px30-pmugrf
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- rockchip,rk3036-grf
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- rockchip,rk3308-grf
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- rockchip,rk3368-pmugrf
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then:
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properties:
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reboot-mode:
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type: object
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$ref: "/schemas/power/reset/syscon-reboot-mode.yaml#"
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unevaluatedProperties: false
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- if:
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properties:
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compatible:
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contains:
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enum:
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- rockchip,px30-usb2phy-grf
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- rockchip,rk3128-grf
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- rockchip,rk3228-grf
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- rockchip,rk3308-usb2phy-grf
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- rockchip,rk3328-usb2phy-grf
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- rockchip,rk3399-grf
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- rockchip,rv1108-grf
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then:
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required:
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- "#address-cells"
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- "#size-cells"
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patternProperties:
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"usb2phy@[0-9a-f]+$":
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type: object
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$ref: /schemas/phy/rockchip,inno-usb2phy.yaml#
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unevaluatedProperties: false
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- if:
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properties:
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compatible:
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contains:
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enum:
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- rockchip,px30-grf
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- rockchip,px30-pmugrf
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- rockchip,rk3188-grf
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- rockchip,rk3228-grf
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- rockchip,rk3288-grf
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- rockchip,rk3328-grf
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- rockchip,rk3368-grf
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- rockchip,rk3368-pmugrf
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- rockchip,rk3399-grf
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- rockchip,rk3399-pmugrf
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- rockchip,rk3568-pmugrf
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- rockchip,rv1108-grf
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- rockchip,rv1108-pmugrf
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then:
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properties:
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io-domains:
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type: object
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$ref: "/schemas/power/rockchip-io-domain.yaml#"
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/rk3399-cru.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/power/rk3399-power.h>
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grf: syscon@ff770000 {
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compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd";
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reg = <0xff770000 0x10000>;
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#address-cells = <1>;
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#size-cells = <1>;
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mipi_dphy_rx0: mipi-dphy-rx0 {
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compatible = "rockchip,rk3399-mipi-dphy-rx0";
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clocks = <&cru SCLK_MIPIDPHY_REF>,
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<&cru SCLK_DPHY_RX0_CFG>,
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<&cru PCLK_VIO_GRF>;
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clock-names = "dphy-ref", "dphy-cfg", "grf";
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power-domains = <&power RK3399_PD_VIO>;
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#phy-cells = <0>;
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};
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u2phy0: usb2phy@e450 {
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compatible = "rockchip,rk3399-usb2phy";
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reg = <0xe450 0x10>;
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clocks = <&cru SCLK_USB2PHY0_REF>;
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clock-names = "phyclk";
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#clock-cells = <0>;
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clock-output-names = "clk_usbphy0_480m";
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u2phy0_host: host-port {
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#phy-cells = <0>;
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interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH 0>;
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interrupt-names = "linestate";
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};
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u2phy0_otg: otg-port {
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#phy-cells = <0>;
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interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH 0>,
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<GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH 0>,
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<GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH 0>;
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interrupt-names = "otg-bvalid", "otg-id",
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"linestate";
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};
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};
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};
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