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49ceb031b6
Convert the existing text-based DT bindings for Mediatek MT8173 Video Processor Unit to a DT schema. Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> [robh: update MAINTAINERS and mediatek-mdp.txt references] Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
75 lines
1.5 KiB
YAML
75 lines
1.5 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/media/mediatek,mt8173-vpu.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Mediatek MT8173 Video Processor Unit
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maintainers:
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- Ariel D'Alessandro <ariel.dalessandro@collabora.com>
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description:
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Video Processor Unit is a HW video controller. It controls HW Codec including
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H.264/VP8/VP9 Decode, H.264/VP8 Encode and Image Processor (scale/rotate/color
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convert).
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properties:
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compatible:
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const: mediatek,mt8173-vpu
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reg:
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maxItems: 2
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reg-names:
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items:
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- const: tcm
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- const: cfg_reg
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interrupts:
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maxItems: 1
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clocks:
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maxItems: 1
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clock-names:
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items:
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- const: main
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memory-region:
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maxItems: 1
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required:
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- compatible
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- reg
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- reg-names
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- interrupts
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- clocks
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- clock-names
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- memory-region
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/mt8173-clk.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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vpu: vpu@10020000 {
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compatible = "mediatek,mt8173-vpu";
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reg = <0 0x10020000 0 0x30000>,
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<0 0x10050000 0 0x100>;
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reg-names = "tcm", "cfg_reg";
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interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&topckgen CLK_TOP_SCP_SEL>;
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clock-names = "main";
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memory-region = <&vpu_dma_reserved>;
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};
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};
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...
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