mirror of
https://github.com/torvalds/linux.git
synced 2026-04-18 06:44:00 -04:00
cdb2511bf3
The USB phy of Sophgo CV18XX series SoC needs to sense a pin called "VBUS_DET" to get the right operation mode. If this pin is not connected, it only supports setting the mode manually. Add USB phy bindings for Sophgo CV18XX/SG200X series SoC. Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250708063038.497473-2-inochiama@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
55 lines
990 B
YAML
55 lines
990 B
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
|
%YAML 1.2
|
|
---
|
|
$id: http://devicetree.org/schemas/phy/sophgo,cv1800b-usb2-phy.yaml#
|
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
|
|
|
title: Sophgo CV18XX/SG200X USB 2.0 PHY
|
|
|
|
maintainers:
|
|
- Inochi Amaoto <inochiama@gmail.com>
|
|
|
|
properties:
|
|
compatible:
|
|
const: sophgo,cv1800b-usb2-phy
|
|
|
|
reg:
|
|
maxItems: 1
|
|
|
|
"#phy-cells":
|
|
const: 0
|
|
|
|
clocks:
|
|
items:
|
|
- description: PHY app clock
|
|
- description: PHY stb clock
|
|
- description: PHY lpm clock
|
|
|
|
clock-names:
|
|
items:
|
|
- const: app
|
|
- const: stb
|
|
- const: lpm
|
|
|
|
resets:
|
|
maxItems: 1
|
|
|
|
required:
|
|
- compatible
|
|
- "#phy-cells"
|
|
- clocks
|
|
- clock-names
|
|
|
|
additionalProperties: false
|
|
|
|
examples:
|
|
- |
|
|
phy@48 {
|
|
compatible = "sophgo,cv1800b-usb2-phy";
|
|
reg = <0x48 0x4>;
|
|
#phy-cells = <0>;
|
|
clocks = <&clk 93>, <&clk 94>, <&clk 95>;
|
|
clock-names = "app", "stb", "lpm";
|
|
resets = <&rst 58>;
|
|
};
|