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The binding for Qualcomm SoC UFS controllers grew and it will grow further. It already includes several conditionals, partially for difference in handling encryption block (ICE, either as phandle or as I/O address space) but it will further grow for MCQ. Prepare for splitting this one big binding into several ones for common group of devices by defining common part for all Qualcomm UFS schemas. This only moves code, no functional impact expected. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250731-dt-bindings-ufs-qcom-v2-1-53bb634bf95a@linaro.org Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
68 lines
1.0 KiB
YAML
68 lines
1.0 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/ufs/qcom,ufs-common.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Universal Flash Storage (UFS) Controller Common Properties
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maintainers:
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- Bjorn Andersson <bjorn.andersson@linaro.org>
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properties:
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clocks:
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minItems: 7
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maxItems: 9
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clock-names:
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minItems: 7
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maxItems: 9
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dma-coherent: true
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interconnects:
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minItems: 2
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maxItems: 2
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interconnect-names:
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items:
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- const: ufs-ddr
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- const: cpu-ufs
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iommus:
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minItems: 1
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maxItems: 2
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phys:
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maxItems: 1
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phy-names:
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items:
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- const: ufsphy
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power-domains:
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maxItems: 1
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required-opps:
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maxItems: 1
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resets:
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maxItems: 1
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'#reset-cells':
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const: 1
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reset-names:
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items:
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- const: rst
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reset-gpios:
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maxItems: 1
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description:
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GPIO connected to the RESET pin of the UFS memory device.
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allOf:
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- $ref: ufs-common.yaml
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additionalProperties: true
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