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253350dbf3
Replace the legacy of_get_named_gpio() / gpio_request_one() /
gpio_set_value() API with the descriptor-based devm_gpiod_get_optional() /
gpiod_set_value() API from <linux/gpio/consumer.h>, removing the
dependency on <linux/of_gpio.h>.
The "reset-n-io" property rename quirk already exists in gpiolib-of.c
(added in commit 9c2cc7171e), so no additional quirk is needed.
Signed-off-by: Jialu Xu <xujialu@vimux.org>
Reviewed-by: Linus Walleij <linusw@kernel.org>
Link: https://patch.msgid.link/DD684946FD7EE161+20260307030623.3495092-4-xujialu@vimux.org
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
135 lines
2.8 KiB
C
135 lines
2.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Marvell NFC driver
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*
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* Copyright (C) 2014-2015, Marvell International Ltd.
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*/
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#ifndef _NFCMRVL_H_
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#define _NFCMRVL_H_
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#include "fw_dnld.h"
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struct gpio_desc;
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/* Define private flags: */
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#define NFCMRVL_NCI_RUNNING 1
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#define NFCMRVL_PHY_ERROR 2
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#define NFCMRVL_EXT_COEX_ID 0xE0
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#define NFCMRVL_NOT_ALLOWED_ID 0xE1
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#define NFCMRVL_ACTIVE_ID 0xE2
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#define NFCMRVL_EXT_COEX_ENABLE 1
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#define NFCMRVL_GPIO_PIN_NFC_NOT_ALLOWED 0xA
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#define NFCMRVL_GPIO_PIN_NFC_ACTIVE 0xB
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#define NFCMRVL_NCI_MAX_EVENT_SIZE 260
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/*
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* NCI FW Parameters
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*/
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#define NFCMRVL_PB_BAIL_OUT 0x11
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#define NFCMRVL_PROP_REF_CLOCK 0xF0
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#define NFCMRVL_PROP_SET_HI_CONFIG 0xF1
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/*
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* HCI defines
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*/
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#define NFCMRVL_HCI_EVENT_HEADER_SIZE 0x04
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#define NFCMRVL_HCI_EVENT_CODE 0x04
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#define NFCMRVL_HCI_NFC_EVENT_CODE 0xFF
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#define NFCMRVL_HCI_COMMAND_CODE 0x01
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#define NFCMRVL_HCI_OGF 0x81
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#define NFCMRVL_HCI_OCF 0xFE
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enum nfcmrvl_phy {
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NFCMRVL_PHY_USB = 0,
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NFCMRVL_PHY_UART = 1,
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NFCMRVL_PHY_I2C = 2,
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NFCMRVL_PHY_SPI = 3,
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};
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struct nfcmrvl_platform_data {
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/*
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* Generic
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*/
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/* GPIO that is wired to RESET_N signal */
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struct gpio_desc *reset_gpio;
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/* Tell if transport is muxed in HCI one */
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bool hci_muxed;
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/*
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* UART specific
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*/
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/* Tell if UART needs flow control at init */
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bool flow_control;
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/* Tell if firmware supports break control for power management */
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bool break_control;
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/*
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* I2C specific
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*/
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unsigned int irq;
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unsigned int irq_polarity;
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};
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struct nfcmrvl_private {
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unsigned long flags;
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/* Platform configuration */
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struct nfcmrvl_platform_data config;
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/* Parent dev */
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struct nci_dev *ndev;
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/* FW download context */
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struct nfcmrvl_fw_dnld fw_dnld;
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/* FW download support */
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bool support_fw_dnld;
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/*
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* PHY related information
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*/
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/* PHY driver context */
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void *drv_data;
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/* PHY device */
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struct device *dev;
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/* PHY type */
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enum nfcmrvl_phy phy;
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/* Low level driver ops */
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const struct nfcmrvl_if_ops *if_ops;
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};
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struct nfcmrvl_if_ops {
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int (*nci_open) (struct nfcmrvl_private *priv);
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int (*nci_close) (struct nfcmrvl_private *priv);
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int (*nci_send) (struct nfcmrvl_private *priv, struct sk_buff *skb);
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void (*nci_update_config)(struct nfcmrvl_private *priv,
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const void *param);
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};
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void nfcmrvl_nci_unregister_dev(struct nfcmrvl_private *priv);
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int nfcmrvl_nci_recv_frame(struct nfcmrvl_private *priv, struct sk_buff *skb);
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struct nfcmrvl_private *nfcmrvl_nci_register_dev(enum nfcmrvl_phy phy,
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void *drv_data,
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const struct nfcmrvl_if_ops *ops,
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struct device *dev,
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const struct nfcmrvl_platform_data *pdata);
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void nfcmrvl_chip_reset(struct nfcmrvl_private *priv);
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void nfcmrvl_chip_halt(struct nfcmrvl_private *priv);
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int nfcmrvl_parse_dt(struct device_node *node,
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struct nfcmrvl_platform_data *pdata);
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#endif
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