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b673d06ea8
Move APQ8064 and IPQ8064 PCIe devices from qcom,pcie.yaml binding to a dedicated file to make reviewing and maintenance easier. New schema is equivalent to the old one with few changes: - Adding a required compatible, which is actually redundant. - Drop the really obvious comments next to clock/reg/reset-names items. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20251217-dt-bindings-pci-qcom-v2-10-873721599754@oss.qualcomm.com
171 lines
4.1 KiB
YAML
171 lines
4.1 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pci/qcom,pcie-apq8064.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm APQ8064/IPQ8064 PCI Express Root Complex
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maintainers:
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- Bjorn Andersson <andersson@kernel.org>
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- Manivannan Sadhasivam <mani@kernel.org>
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properties:
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compatible:
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enum:
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- qcom,pcie-apq8064
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- qcom,pcie-ipq8064
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- qcom,pcie-ipq8064-v2
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reg:
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maxItems: 4
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reg-names:
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items:
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- const: dbi
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- const: elbi
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- const: parf
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- const: config
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clocks:
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minItems: 3
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maxItems: 5
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clock-names:
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minItems: 3
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items:
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- const: core # Clocks the pcie hw block
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- const: iface # Configuration AHB clock
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- const: phy
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- const: aux
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- const: ref
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interrupts:
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maxItems: 1
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interrupt-names:
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items:
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- const: msi
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resets:
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minItems: 5
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maxItems: 6
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reset-names:
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minItems: 5
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items:
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- const: axi
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- const: ahb
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- const: por
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- const: pci
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- const: phy
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- const: ext
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vdda-supply:
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description: A phandle to the core analog power supply
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vdda_phy-supply:
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description: A phandle to the core analog power supply for PHY
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vdda_refclk-supply:
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description: A phandle to the core analog power supply for IC which generates reference clock
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required:
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- resets
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- reset-names
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- vdda-supply
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- vdda_phy-supply
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- vdda_refclk-supply
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allOf:
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- $ref: qcom,pcie-common.yaml#
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,pcie-apq8064
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then:
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properties:
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clocks:
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maxItems: 3
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clock-names:
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maxItems: 3
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resets:
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maxItems: 5
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reset-names:
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maxItems: 5
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else:
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properties:
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clocks:
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minItems: 5
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clock-names:
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minItems: 5
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resets:
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minItems: 6
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reset-names:
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minItems: 6
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,gcc-msm8960.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/reset/qcom,gcc-msm8960.h>
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pcie@1b500000 {
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compatible = "qcom,pcie-apq8064";
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reg = <0x1b500000 0x1000>,
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<0x1b502000 0x80>,
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<0x1b600000 0x100>,
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<0x0ff00000 0x100000>;
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reg-names = "dbi", "elbi", "parf", "config";
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ranges = <0x81000000 0x0 0x00000000 0x0fe00000 0x0 0x00100000>, /* I/O */
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<0x82000000 0x0 0x08000000 0x08000000 0x0 0x07e00000>; /* mem */
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device_type = "pci";
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linux,pci-domain = <0>;
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bus-range = <0x00 0xff>;
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num-lanes = <1>;
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#address-cells = <3>;
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#size-cells = <2>;
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clocks = <&gcc PCIE_A_CLK>,
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<&gcc PCIE_H_CLK>,
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<&gcc PCIE_PHY_REF_CLK>;
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clock-names = "core", "iface", "phy";
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interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "msi";
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0x7>;
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interrupt-map = <0 0 0 1 &intc GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
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<0 0 0 2 &intc GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
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<0 0 0 3 &intc GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
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<0 0 0 4 &intc GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
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resets = <&gcc PCIE_ACLK_RESET>,
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<&gcc PCIE_HCLK_RESET>,
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<&gcc PCIE_POR_RESET>,
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<&gcc PCIE_PCI_RESET>,
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<&gcc PCIE_PHY_RESET>;
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reset-names = "axi", "ahb", "por", "pci", "phy";
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perst-gpios = <&tlmm_pinmux 27 GPIO_ACTIVE_LOW>;
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vdda-supply = <&pm8921_s3>;
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vdda_phy-supply = <&pm8921_lvs6>;
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vdda_refclk-supply = <&v3p3_fixed>;
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pcie@0 {
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device_type = "pci";
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reg = <0x0 0x0 0x0 0x0 0x0>;
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bus-range = <0x01 0xff>;
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#address-cells = <3>;
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#size-cells = <2>;
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ranges;
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};
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};
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