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08502cebee
Update for DCN 4.0.1. Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
124 lines
3.8 KiB
C
124 lines
3.8 KiB
C
/*
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* Copyright 2019 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: AMD
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*
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*/
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#ifndef _DMUB_REG_H_
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#define _DMUB_REG_H_
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#include "../inc/dmub_cmd.h"
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struct dmub_srv;
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/* Register offset and field lookup. */
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#define BASE(seg) BASE_INNER(seg)
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#define REG_OFFSET(reg_name) (BASE(mm##reg_name##_BASE_IDX) + mm##reg_name)
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#define FD_SHIFT(reg_name, field) reg_name##__##field##__SHIFT
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#define FD_MASK(reg_name, field) reg_name##__##field##_MASK
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#define REG(reg) (REGS)->offset.reg
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#define FD(reg_field) (REGS)->shift.reg_field, (REGS)->mask.reg_field
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#define FN(reg_name, field) FD(reg_name##__##field)
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/* Register reads and writes. */
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#define REG_READ(reg) ((CTX)->funcs.reg_read((CTX)->user_ctx, REG(reg)))
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#define REG_WRITE(reg, val) \
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((CTX)->funcs.reg_write((CTX)->user_ctx, REG(reg), (val)))
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/* Register field setting. */
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#define REG_SET_N(reg_name, n, initial_val, ...) \
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dmub_reg_set(CTX, REG(reg_name), initial_val, n, __VA_ARGS__)
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#define REG_SET(reg_name, initial_val, field, val) \
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REG_SET_N(reg_name, 1, initial_val, \
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FN(reg_name, field), val)
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#define REG_SET_2(reg, init_value, f1, v1, f2, v2) \
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REG_SET_N(reg, 2, init_value, \
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FN(reg, f1), v1, \
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FN(reg, f2), v2)
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#define REG_SET_3(reg, init_value, f1, v1, f2, v2, f3, v3) \
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REG_SET_N(reg, 3, init_value, \
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FN(reg, f1), v1, \
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FN(reg, f2), v2, \
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FN(reg, f3), v3)
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#define REG_SET_4(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4) \
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REG_SET_N(reg, 4, init_value, \
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FN(reg, f1), v1, \
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FN(reg, f2), v2, \
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FN(reg, f3), v3, \
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FN(reg, f4), v4)
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/* Register field updating. */
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#define REG_UPDATE_N(reg_name, n, ...)\
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dmub_reg_update(CTX, REG(reg_name), n, __VA_ARGS__)
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#define REG_UPDATE(reg_name, field, val) \
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REG_UPDATE_N(reg_name, 1, \
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FN(reg_name, field), val)
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#define REG_UPDATE_2(reg, f1, v1, f2, v2) \
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REG_UPDATE_N(reg, 2,\
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FN(reg, f1), v1,\
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FN(reg, f2), v2)
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#define REG_UPDATE_3(reg, f1, v1, f2, v2, f3, v3) \
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REG_UPDATE_N(reg, 3, \
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FN(reg, f1), v1, \
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FN(reg, f2), v2, \
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FN(reg, f3), v3)
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#define REG_UPDATE_4(reg, f1, v1, f2, v2, f3, v3, f4, v4) \
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REG_UPDATE_N(reg, 4, \
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FN(reg, f1), v1, \
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FN(reg, f2), v2, \
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FN(reg, f3), v3, \
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FN(reg, f4), v4)
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/* Register field getting. */
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#define REG_GET(reg_name, field, val) \
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dmub_reg_get(CTX, REG(reg_name), FN(reg_name, field), val)
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void dmub_reg_set(struct dmub_srv *srv, uint32_t addr, uint32_t reg_val, int n,
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uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...);
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void dmub_reg_update(struct dmub_srv *srv, uint32_t addr, int n, uint8_t shift1,
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uint32_t mask1, uint32_t field_value1, ...);
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void dmub_reg_get(struct dmub_srv *srv, uint32_t addr, uint8_t shift,
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uint32_t mask, uint32_t *field_value);
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#endif /* _DMUB_REG_H_ */
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