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The usage of cpu_relax() requires vdso/processor.h. Currently this header is included transitively, but that transitive inclusion is about to go away. Explicitly include the header. Signed-off-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@kernel.org> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://patch.msgid.link/20260227-vdso-header-cleanups-v2-11-35d60acf7410@linutronix.de
117 lines
3.0 KiB
C
117 lines
3.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __VDSO_HELPERS_H
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#define __VDSO_HELPERS_H
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#ifndef __ASSEMBLY__
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#include <asm/barrier.h>
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#include <vdso/datapage.h>
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#include <vdso/processor.h>
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#include <vdso/clocksource.h>
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static __always_inline bool vdso_is_timens_clock(const struct vdso_clock *vc)
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{
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return IS_ENABLED(CONFIG_TIME_NS) && vc->clock_mode == VDSO_CLOCKMODE_TIMENS;
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}
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static __always_inline u32 vdso_read_begin(const struct vdso_clock *vc)
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{
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u32 seq;
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while (unlikely((seq = READ_ONCE(vc->seq)) & 1))
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cpu_relax();
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smp_rmb();
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return seq;
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}
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/*
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* Variant of vdso_read_begin() to handle VDSO_CLOCKMODE_TIMENS.
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*
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* Time namespace enabled tasks have a special VVAR page installed which has
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* vc->seq set to 1 and vc->clock_mode set to VDSO_CLOCKMODE_TIMENS. For non
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* time namespace affected tasks this does not affect performance because if
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* vc->seq is odd, i.e. a concurrent update is in progress the extra check for
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* vc->clock_mode is just a few extra instructions while spin waiting for
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* vc->seq to become even again.
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*/
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static __always_inline bool vdso_read_begin_timens(const struct vdso_clock *vc, u32 *seq)
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{
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while (unlikely((*seq = READ_ONCE(vc->seq)) & 1)) {
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if (vdso_is_timens_clock(vc))
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return true;
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cpu_relax();
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}
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smp_rmb();
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return false;
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}
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static __always_inline u32 vdso_read_retry(const struct vdso_clock *vc,
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u32 start)
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{
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u32 seq;
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smp_rmb();
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seq = READ_ONCE(vc->seq);
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return unlikely(seq != start);
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}
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static __always_inline void vdso_write_seq_begin(struct vdso_clock *vc)
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{
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/*
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* WRITE_ONCE() is required otherwise the compiler can validly tear
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* updates to vc->seq and it is possible that the value seen by the
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* reader is inconsistent.
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*/
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WRITE_ONCE(vc->seq, vc->seq + 1);
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}
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static __always_inline void vdso_write_seq_end(struct vdso_clock *vc)
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{
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/*
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* WRITE_ONCE() is required otherwise the compiler can validly tear
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* updates to vc->seq and it is possible that the value seen by the
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* reader is inconsistent.
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*/
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WRITE_ONCE(vc->seq, vc->seq + 1);
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}
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static __always_inline void vdso_write_begin_clock(struct vdso_clock *vc)
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{
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vdso_write_seq_begin(vc);
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/* Ensure the sequence invalidation is visible before data is modified */
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smp_wmb();
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}
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static __always_inline void vdso_write_end_clock(struct vdso_clock *vc)
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{
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/* Ensure the data update is visible before the sequence is set valid again */
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smp_wmb();
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vdso_write_seq_end(vc);
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}
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static __always_inline void vdso_write_begin(struct vdso_time_data *vd)
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{
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struct vdso_clock *vc = vd->clock_data;
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vdso_write_seq_begin(&vc[CS_HRES_COARSE]);
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vdso_write_seq_begin(&vc[CS_RAW]);
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/* Ensure the sequence invalidation is visible before data is modified */
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smp_wmb();
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}
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static __always_inline void vdso_write_end(struct vdso_time_data *vd)
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{
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struct vdso_clock *vc = vd->clock_data;
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/* Ensure the data update is visible before the sequence is set valid again */
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smp_wmb();
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vdso_write_seq_end(&vc[CS_HRES_COARSE]);
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vdso_write_seq_end(&vc[CS_RAW]);
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}
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#endif /* !__ASSEMBLY__ */
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#endif /* __VDSO_HELPERS_H */
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