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The Allwinner A10 CMOS Sensor Interface is a camera capture interface also used in later (A10s, A13, A20, R8 and GR8) SoCs. On some SoCs, like the A10, there's multiple instances of that controller, with one instance supporting more channels and having an ISP. [Sakari Ailus: Add type: object to the endpoint node.] Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
110 lines
2.4 KiB
YAML
110 lines
2.4 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/arm/allwinner,sun4i-a10-csi.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Allwinner A10 CMOS Sensor Interface (CSI) Device Tree Bindings
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maintainers:
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- Chen-Yu Tsai <wens@csie.org>
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- Maxime Ripard <maxime.ripard@bootlin.com>
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description: |-
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The Allwinner A10 and later has a CMOS Sensor Interface to retrieve
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frames from a parallel or BT656 sensor.
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properties:
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compatible:
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const: allwinner,sun7i-a20-csi0
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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items:
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- description: The CSI interface clock
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- description: The CSI module clock
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- description: The CSI ISP clock
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- description: The CSI DRAM clock
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clock-names:
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items:
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- const: bus
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- const: mod
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- const: isp
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- const: ram
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resets:
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maxItems: 1
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# See ./video-interfaces.txt for details
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port:
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type: object
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additionalProperties: false
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properties:
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endpoint:
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type: object
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properties:
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bus-width:
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enum: [8, 16]
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data-active: true
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hsync-active: true
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pclk-sample: true
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remote-endpoint: true
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vsync-active: true
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required:
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- bus-width
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- data-active
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- hsync-active
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- pclk-sample
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- remote-endpoint
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- vsync-active
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required:
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- endpoint
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/sun7i-a20-ccu.h>
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#include <dt-bindings/reset/sun4i-a10-ccu.h>
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csi0: csi@1c09000 {
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compatible = "allwinner,sun7i-a20-csi0";
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reg = <0x01c09000 0x1000>;
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interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&ccu CLK_AHB_CSI0>, <&ccu CLK_CSI0>,
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<&ccu CLK_CSI_SCLK>, <&ccu CLK_DRAM_CSI0>;
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clock-names = "bus", "mod", "isp", "ram";
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resets = <&ccu RST_CSI0>;
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port {
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csi_from_ov5640: endpoint {
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remote-endpoint = <&ov5640_to_csi>;
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bus-width = <8>;
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hsync-active = <1>; /* Active high */
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vsync-active = <0>; /* Active low */
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data-active = <1>; /* Active high */
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pclk-sample = <1>; /* Rising */
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};
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};
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};
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...
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