mirror of
https://github.com/torvalds/linux.git
synced 2026-04-18 14:53:58 -04:00
fee6de80bd
Add compatible strings for i.MX8M(Q), i.MX8M Mini, i.MX8M Nano, i.MX8M Plus. All these SoCs have the SNVS LPGPR registers and they are at the same offset as on i.MX7D. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Anson Huang <Anson.Huang@nxp.com> Cc: Fabio Estevam <festevam@denx.de> Cc: Oleksij Rempel <linux@rempel-privat.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: NXP Linux Team <linux-imx@nxp.com> Cc: devicetree@vger.kernel.org To: linux-arm-kernel@lists.infradead.org Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220407103016.16543-1-marex@denx.de
38 lines
865 B
YAML
38 lines
865 B
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
|
%YAML 1.2
|
|
---
|
|
$id: http://devicetree.org/schemas/nvmem/snvs-lpgpr.yaml#
|
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
|
|
|
title: Low Power General Purpose Register found in i.MX Secure Non-Volatile Storage
|
|
|
|
maintainers:
|
|
- Oleksij Rempel <o.rempel@pengutronix.de>
|
|
|
|
properties:
|
|
compatible:
|
|
enum:
|
|
- fsl,imx6q-snvs-lpgpr
|
|
- fsl,imx6ul-snvs-lpgpr
|
|
- fsl,imx7d-snvs-lpgpr
|
|
- fsl,imx8mm-snvs-lpgpr
|
|
- fsl,imx8mn-snvs-lpgpr
|
|
- fsl,imx8mp-snvs-lpgpr
|
|
- fsl,imx8mq-snvs-lpgpr
|
|
|
|
required:
|
|
- compatible
|
|
|
|
additionalProperties: false
|
|
|
|
examples:
|
|
- |
|
|
snvs@20cc000 {
|
|
compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
|
|
reg = <0x20cc000 0x4000>;
|
|
|
|
snvs_lpgpr: snvs-lpgpr {
|
|
compatible = "fsl,imx6q-snvs-lpgpr";
|
|
};
|
|
};
|