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Track dc balance flip count with params per crtc. Increment DC Balance Flip count before every flip to indicate DMC firmware about new flip occurrence which needs to be adjusted for dc balancing. This is tracked separately from legacy FLIP_COUNT register also Reset DC balance flip count value while disabling VRR adaptive mode, this is to start with fresh counts when VRR adaptive refresh mode is triggered again. --v2: - Call during intel_update_crtc.(Ankit) Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com> Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Link: https://patch.msgid.link/20251223104542.2688548-11-mitulkumar.ajitkumar.golani@intel.com
57 lines
2.7 KiB
C
57 lines
2.7 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2019 Intel Corporation
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*/
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#ifndef __INTEL_VRR_H__
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#define __INTEL_VRR_H__
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#include <linux/types.h>
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struct drm_connector_state;
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struct intel_atomic_state;
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struct intel_connector;
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struct intel_crtc;
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struct intel_crtc_state;
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struct intel_dsb;
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struct intel_display;
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bool intel_vrr_is_capable(struct intel_connector *connector);
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bool intel_vrr_is_in_range(struct intel_connector *connector, int vrefresh);
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bool intel_vrr_possible(const struct intel_crtc_state *crtc_state);
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void intel_vrr_check_modeset(struct intel_atomic_state *state);
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void intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
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struct drm_connector_state *conn_state);
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void intel_vrr_compute_guardband(struct intel_crtc_state *crtc_state);
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void intel_vrr_set_transcoder_timings(const struct intel_crtc_state *crtc_state);
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void intel_vrr_enable(const struct intel_crtc_state *crtc_state);
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void intel_vrr_send_push(struct intel_dsb *dsb,
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const struct intel_crtc_state *crtc_state);
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void intel_vrr_check_push_sent(struct intel_dsb *dsb,
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const struct intel_crtc_state *crtc_state);
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void intel_vrr_dcb_increment_flip_count(struct intel_crtc_state *crtc_state,
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struct intel_crtc *crtc);
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bool intel_vrr_is_push_sent(const struct intel_crtc_state *crtc_state);
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void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state);
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void intel_vrr_get_config(struct intel_crtc_state *crtc_state);
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int intel_vrr_vmax_vtotal(const struct intel_crtc_state *crtc_state);
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int intel_vrr_vmin_vtotal(const struct intel_crtc_state *crtc_state);
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int intel_vrr_vmax_vblank_start(const struct intel_crtc_state *crtc_state);
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int intel_vrr_vmin_vblank_start(const struct intel_crtc_state *crtc_state);
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bool intel_vrr_is_fixed_rr(const struct intel_crtc_state *crtc_state);
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void intel_vrr_transcoder_enable(const struct intel_crtc_state *crtc_state);
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void intel_vrr_transcoder_disable(const struct intel_crtc_state *crtc_state);
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void intel_vrr_set_fixed_rr_timings(const struct intel_crtc_state *crtc_state);
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void intel_vrr_dcb_reset(const struct intel_crtc_state *old_crtc_state,
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struct intel_crtc *crtc);
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bool intel_vrr_always_use_vrr_tg(struct intel_display *display);
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int intel_vrr_safe_window_start(const struct intel_crtc_state *crtc_state);
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int intel_vrr_vmin_safe_window_end(const struct intel_crtc_state *crtc_state);
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int intel_vrr_dcb_vmin_vblank_start_next(const struct intel_crtc_state *crtc_state);
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int intel_vrr_dcb_vmax_vblank_start_next(const struct intel_crtc_state *crtc_state);
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int intel_vrr_dcb_vmin_vblank_start_final(const struct intel_crtc_state *crtc_state);
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int intel_vrr_dcb_vmax_vblank_start_final(const struct intel_crtc_state *crtc_state);
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#endif /* __INTEL_VRR_H__ */
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