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The SMC1 block on i.MX7ULP is already used as a clock provider in
imx7ulp.dtsi, but the corresponding dt-binding schema does not define
the required '#clock-cells' property. This results in CHECK_DTBS schema
validation errors.
Functionally, SMC1 controls the CPU run mode configuration:
- 00b: Normal Run (RUN)
- 10b: Very-Low-Power Run (VLPR)
- 11b: High-Speed Run (HSRUN)
These run modes determine the effective CPU operating point, and their
programming is tied to the OPP table.
Add the missing `#clock-cells` definition so the dt-binding schema is
consistent with the DTS and validates correctly.
Fixes: 8ba41d6bd9 ("dt-bindings: fsl: Convert i.MX7ULP PM to json-schema")
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
56 lines
1.3 KiB
YAML
56 lines
1.3 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/arm/freescale/fsl,imx7ulp-pm.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Freescale i.MX7ULP Power Management Components
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maintainers:
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- A.s. Dong <aisheng.dong@nxp.com>
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description: |
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The Multi-System Mode Controller (MSMC) is responsible for sequencing
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the MCU into and out of all stop and run power modes. Specifically, it
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monitors events to trigger transitions between power modes while
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controlling the power, clocks, and memories of the MCU to achieve the
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power consumption and functionality of that mode.
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The WFI or WFE instruction is used to invoke a Sleep, Deep Sleep or
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Standby modes for either Cortex family. Run, Wait, and Stop are the
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common terms used for the primary operating modes of Kinetis
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microcontrollers.
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properties:
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compatible:
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const: fsl,imx7ulp-smc1
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reg:
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maxItems: 1
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'#clock-cells':
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const: 1
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clocks:
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maxItems: 2
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clock-names:
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items:
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- const: divcore
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- const: hsrun_divcore
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required:
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- compatible
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- reg
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- '#clock-cells'
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additionalProperties: false
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examples:
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- |
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smc1@40410000 {
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compatible = "fsl,imx7ulp-smc1";
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reg = <0x40410000 0x1000>;
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#clock-cells = <1>;
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};
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