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Document CSI HW block found in Tegra20 and Tegra30 SoC. The #nvidia,mipi-calibrate-cells is not an introduction of property, such property already exists in nvidia,tegra114-mipi.yaml and is used in multiple device trees. In case of Tegra30 and Tegra20 CSI block combines mipi calibration function and CSI function, in Tegra114+ mipi calibration got a dedicated hardware block which is already supported. This property here is used to align with mipi-calibration logic used by Tegra114+. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
139 lines
2.9 KiB
YAML
139 lines
2.9 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-csi.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NVIDIA Tegra20 CSI controller
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maintainers:
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- Svyatoslav Ryhel <clamor95@gmail.com>
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properties:
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compatible:
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enum:
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- nvidia,tegra20-csi
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- nvidia,tegra30-csi
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reg:
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maxItems: 1
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clocks:
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minItems: 1
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items:
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- description: module clock
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- description: PAD A clock
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- description: PAD B clock
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clock-names:
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items:
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- const: csi
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- const: csia-pad
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- const: csib-pad
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avdd-dsi-csi-supply:
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description: DSI/CSI power supply. Must supply 1.2 V.
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power-domains:
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maxItems: 1
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"#nvidia,mipi-calibrate-cells":
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description:
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The number of cells in a MIPI calibration specifier. Should be 1.
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The single cell specifies an id of the pad that need to be
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calibrated for a given device. Valid pad ids for receiver would be
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0 for CSI-A; 1 for CSI-B; 2 for DSI-A and 3 for DSI-B.
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$ref: /schemas/types.yaml#/definitions/uint32
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const: 1
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"#address-cells":
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const: 1
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"#size-cells":
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const: 0
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patternProperties:
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"^channel@[0-1]$":
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type: object
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description: channel 0 represents CSI-A and 1 represents CSI-B
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additionalProperties: false
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properties:
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reg:
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maximum: 1
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nvidia,mipi-calibrate:
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description: Should contain a phandle and a specifier specifying
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which pad is used by this CSI channel and needs to be calibrated.
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$ref: /schemas/types.yaml#/definitions/phandle-array
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"#address-cells":
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const: 1
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"#size-cells":
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const: 0
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port@0:
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$ref: /schemas/graph.yaml#/$defs/port-base
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unevaluatedProperties: false
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description: port receiving the video stream from the sensor
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properties:
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endpoint:
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$ref: /schemas/media/video-interfaces.yaml#
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unevaluatedProperties: false
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required:
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- data-lanes
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port@1:
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$ref: /schemas/graph.yaml#/properties/port
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description: port sending the video stream to the VI
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required:
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- reg
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- "#address-cells"
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- "#size-cells"
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- port@0
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- port@1
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allOf:
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- if:
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properties:
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compatible:
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contains:
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enum:
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- nvidia,tegra20-csi
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then:
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properties:
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clocks:
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maxItems: 1
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clock-names: false
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- if:
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properties:
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compatible:
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contains:
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enum:
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- nvidia,tegra30-csi
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then:
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properties:
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clocks:
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minItems: 3
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clock-names:
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minItems: 3
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additionalProperties: false
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required:
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- compatible
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- reg
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- clocks
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- power-domains
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- "#address-cells"
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- "#size-cells"
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# see nvidia,tegra20-vi.yaml for an example
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