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Convert the APM XGene Ethernet binding to DT schema format. Add the missing apm,xgene2-sgenet and apm,xgene2-xgenet compatibles. Drop "reg-names" as required. Add support for up to 16 interrupts. Reviewed-by: Jacob Keller <jacob.e.keller@intel.com> Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250908231016.2070305-1-robh@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
116 lines
2.5 KiB
YAML
116 lines
2.5 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/apm,xgene-enet.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: APM X-Gene SoC Ethernet
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maintainers:
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- Iyappan Subramanian <iyappan@os.amperecomputing.com>
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- Keyur Chudgar <keyur@os.amperecomputing.com>
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- Quan Nguyen <quan@os.amperecomputing.com>
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allOf:
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- $ref: ethernet-controller.yaml#
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properties:
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compatible:
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enum:
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- apm,xgene-enet
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- apm,xgene1-sgenet
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- apm,xgene1-xgenet
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- apm,xgene2-sgenet
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- apm,xgene2-xgenet
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reg:
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maxItems: 3
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reg-names:
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items:
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- const: enet_csr
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- const: ring_csr
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- const: ring_cmd
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clocks:
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maxItems: 1
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dma-coherent: true
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interrupts:
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description: An rx and tx completion interrupt pair per queue
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minItems: 1
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maxItems: 16
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channel:
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description: Ethernet to CPU start channel number
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$ref: /schemas/types.yaml#/definitions/uint32
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port-id:
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description: Port number
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$ref: /schemas/types.yaml#/definitions/uint32
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maximum: 1
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tx-delay:
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description: Delay value for RGMII bridge TX clock
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$ref: /schemas/types.yaml#/definitions/uint32
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maximum: 7
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default: 4
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rx-delay:
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description: Delay value for RGMII bridge RX clock
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$ref: /schemas/types.yaml#/definitions/uint32
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maximum: 7
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default: 2
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rxlos-gpios:
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description: Input GPIO from SFP+ module indicating incoming signal
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maxItems: 1
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mdio:
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description: MDIO bus subnode
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$ref: mdio.yaml#
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unevaluatedProperties: false
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properties:
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compatible:
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const: apm,xgene-mdio
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required:
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- compatible
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required:
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- compatible
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- reg
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- interrupts
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unevaluatedProperties: false
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examples:
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- |
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ethernet@17020000 {
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compatible = "apm,xgene-enet";
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reg = <0x17020000 0xd100>,
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<0x17030000 0x400>,
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<0x10000000 0x200>;
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reg-names = "enet_csr", "ring_csr", "ring_cmd";
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interrupts = <0x0 0x3c 0x4>;
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channel = <0>;
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port-id = <0>;
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clocks = <&menetclk 0>;
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local-mac-address = [00 01 73 00 00 01];
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phy-connection-type = "rgmii";
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phy-handle = <&menetphy>;
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mdio {
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compatible = "apm,xgene-mdio";
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#address-cells = <1>;
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#size-cells = <0>;
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menetphy: ethernet-phy@3 {
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compatible = "ethernet-phy-id001c.c915";
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reg = <3>;
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};
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};
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};
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