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Add device tree binding documentation for the Qualcomm QMP USB3+DP PHY on QCS615 Platform. This PHY supports both USB3 and DP functionality over USB-C, with PHY mode switching capability. It does not support combo mode. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Xiangxu Yin <xiangxu.yin@oss.qualcomm.com> Link: https://patch.msgid.link/20251215-add-displayport-support-for-qcs615-platform-v8-1-cbc72c88a44e@oss.qualcomm.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
112 lines
2.4 KiB
YAML
112 lines
2.4 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/phy/qcom,qcs615-qmp-usb3dp-phy.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm QMP USB3-DP PHY controller (DP, QCS615)
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maintainers:
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- Xiangxu Yin <xiangxu.yin@oss.qualcomm.com>
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description:
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The QMP PHY controller supports physical layer functionality for both USB3
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and DisplayPort over USB-C. While it enables mode switching between USB3 and
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DisplayPort, but does not support combo mode.
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properties:
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compatible:
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enum:
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- qcom,qcs615-qmp-usb3-dp-phy
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reg:
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maxItems: 1
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clocks:
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maxItems: 4
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clock-names:
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items:
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- const: aux
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- const: ref
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- const: cfg_ahb
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- const: pipe
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resets:
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maxItems: 2
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reset-names:
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items:
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- const: phy_phy
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- const: dp_phy
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vdda-phy-supply: true
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vdda-pll-supply: true
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"#clock-cells":
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const: 1
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description:
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See include/dt-bindings/phy/phy-qcom-qmp.h
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"#phy-cells":
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const: 1
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description:
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See include/dt-bindings/phy/phy-qcom-qmp.h
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qcom,tcsr-reg:
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$ref: /schemas/types.yaml#/definitions/phandle-array
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items:
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- items:
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- description: phandle to TCSR hardware block
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- description: offset of the VLS CLAMP register
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- description: offset of the PHY mode register
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description: Clamp and PHY mode register present in the TCSR
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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- resets
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- reset-names
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- vdda-phy-supply
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- vdda-pll-supply
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- "#clock-cells"
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- "#phy-cells"
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- qcom,tcsr-reg
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,qcs615-gcc.h>
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#include <dt-bindings/clock/qcom,rpmh.h>
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phy@88e8000 {
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compatible = "qcom,qcs615-qmp-usb3-dp-phy";
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reg = <0x88e8000 0x2000>;
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clocks = <&gcc GCC_USB2_SEC_PHY_AUX_CLK>,
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<&gcc GCC_USB3_SEC_CLKREF_CLK>,
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<&gcc GCC_AHB2PHY_WEST_CLK>,
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<&gcc GCC_USB2_SEC_PHY_PIPE_CLK>;
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clock-names = "aux",
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"ref",
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"cfg_ahb",
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"pipe";
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resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>,
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<&gcc GCC_USB3_DP_PHY_SEC_BCR>;
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reset-names = "phy_phy",
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"dp_phy";
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vdda-phy-supply = <&vreg_l5a>;
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vdda-pll-supply = <&vreg_l12a>;
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#clock-cells = <1>;
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#phy-cells = <1>;
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qcom,tcsr-reg = <&tcsr 0xbff0 0xb24c>;
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};
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