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2e706f86a5
Extend the ADI AXI SPI engine binding for multiple data lanes. This SPI controller has a capability to read multiple data words at the same time (e.g. for use with simultaneous sampling ADCs). The current FPGA implementation can support up to 8 data lanes at a time (depending on a compile-time configuration option). Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com> Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20260123-spi-add-multi-bus-support-v6-6-12af183c06eb@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
106 lines
2.3 KiB
YAML
106 lines
2.3 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/spi/adi,axi-spi-engine.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Analog Devices AXI SPI Engine Controller
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description: |
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The AXI SPI Engine controller is part of the SPI Engine framework[1] and
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allows memory mapped access to the SPI Engine control bus. This allows it
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to be used as a general purpose software driven SPI controller as well as
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some optional advanced acceleration and offloading capabilities.
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[1] https://wiki.analog.com/resources/fpga/peripherals/spi_engine
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maintainers:
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- Michael Hennerich <Michael.Hennerich@analog.com>
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- Nuno Sá <nuno.sa@analog.com>
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allOf:
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- $ref: /schemas/spi/spi-controller.yaml#
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properties:
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compatible:
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const: adi,axi-spi-engine-1.00.a
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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items:
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- description: The AXI interconnect clock.
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- description: The SPI controller clock.
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clock-names:
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items:
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- const: s_axi_aclk
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- const: spi_clk
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trigger-sources:
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description:
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An array of trigger source phandles for offload instances. The index in
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the array corresponds to the offload instance number.
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minItems: 1
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maxItems: 32
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dmas:
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description:
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DMA channels connected to the input or output stream interface of an
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offload instance.
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minItems: 1
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maxItems: 32
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dma-names:
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items:
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pattern: "^offload(?:[12]?[0-9]|3[01])-[tr]x$"
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minItems: 1
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maxItems: 32
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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unevaluatedProperties: false
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patternProperties:
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"^.*@[0-9a-f]+":
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type: object
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properties:
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spi-rx-bus-width:
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maxItems: 8
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items:
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enum: [0, 1]
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spi-tx-bus-width:
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maxItems: 8
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items:
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enum: [0, 1]
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examples:
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- |
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spi@44a00000 {
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compatible = "adi,axi-spi-engine-1.00.a";
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reg = <0x44a00000 0x1000>;
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interrupts = <0 56 4>;
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clocks = <&clkc 15>, <&clkc 15>;
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clock-names = "s_axi_aclk", "spi_clk";
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trigger-sources = <&trigger_clock>;
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dmas = <&dma 0>;
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dma-names = "offload0-rx";
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#address-cells = <1>;
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#size-cells = <0>;
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/* SPI devices */
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};
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