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26279c8d5e
The sdma script app_2_mcu needs the permission to access the peripheral devices: 1) SDMA2 transactions are set to user-mode in this particular case. 2) This type of script doesn't use the peripheral interface (connected directly to SPBA), but it uses the peripheral DMA interface, then the SDMA2-issued transactions are subjected to AIPSTZ5's security-related checks. So need to clear the Supervisor Protect bit of SPBA2, otherwise the sdma script can't work. As the imx-aipstz is a common driver for all aips bus, so set default value (zero) for all opacr registers. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Reviewed-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com> Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
124 lines
3.2 KiB
C
124 lines
3.2 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright 2025 NXP
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*/
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/regmap.h>
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#define IMX_AIPSTZ_MPR0 0x0
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#define IMX_AIPSTZ_OPACR0 0x40
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#define IMX_AIPSTZ_OPACR1 0x44
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#define IMX_AIPSTZ_OPACR2 0x48
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#define IMX_AIPSTZ_OPACR3 0x4c
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#define IMX_AIPSTZ_OPACR4 0x50
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struct imx_aipstz_config {
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u32 mpr0;
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u32 opacr0;
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u32 opacr1;
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u32 opacr2;
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u32 opacr3;
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u32 opacr4;
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};
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struct imx_aipstz_data {
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void __iomem *base;
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const struct imx_aipstz_config *default_cfg;
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};
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static void imx_aipstz_apply_default(struct imx_aipstz_data *data)
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{
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writel(data->default_cfg->mpr0, data->base + IMX_AIPSTZ_MPR0);
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writel(data->default_cfg->opacr0, data->base + IMX_AIPSTZ_OPACR0);
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writel(data->default_cfg->opacr1, data->base + IMX_AIPSTZ_OPACR1);
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writel(data->default_cfg->opacr2, data->base + IMX_AIPSTZ_OPACR2);
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writel(data->default_cfg->opacr3, data->base + IMX_AIPSTZ_OPACR3);
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writel(data->default_cfg->opacr4, data->base + IMX_AIPSTZ_OPACR4);
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}
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static const struct of_device_id imx_aipstz_match_table[] = {
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{ .compatible = "simple-bus", },
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{ }
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};
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static int imx_aipstz_probe(struct platform_device *pdev)
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{
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struct imx_aipstz_data *data;
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data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
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if (!data)
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return dev_err_probe(&pdev->dev, -ENOMEM,
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"failed to allocate data memory\n");
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data->base = devm_platform_get_and_ioremap_resource(pdev, 0, NULL);
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if (IS_ERR(data->base))
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return dev_err_probe(&pdev->dev, -ENOMEM,
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"failed to get/ioremap AC memory\n");
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data->default_cfg = of_device_get_match_data(&pdev->dev);
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imx_aipstz_apply_default(data);
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dev_set_drvdata(&pdev->dev, data);
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pm_runtime_set_active(&pdev->dev);
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devm_pm_runtime_enable(&pdev->dev);
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return of_platform_populate(pdev->dev.of_node, imx_aipstz_match_table,
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NULL, &pdev->dev);
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}
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static void imx_aipstz_remove(struct platform_device *pdev)
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{
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of_platform_depopulate(&pdev->dev);
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}
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static int imx_aipstz_runtime_resume(struct device *dev)
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{
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struct imx_aipstz_data *data = dev_get_drvdata(dev);
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/* restore potentially lost configuration during domain power-off */
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imx_aipstz_apply_default(data);
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return 0;
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}
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static const struct dev_pm_ops imx_aipstz_pm_ops = {
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RUNTIME_PM_OPS(NULL, imx_aipstz_runtime_resume, NULL)
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SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, pm_runtime_force_resume)
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};
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/*
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* following configuration is equivalent to:
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* masters 0-7 => trusted for R/W + use AHB's HPROT[1] to det. privilege
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*/
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static const struct imx_aipstz_config imx8mp_aipstz_default_cfg = {
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.mpr0 = 0x77777777,
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};
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static const struct of_device_id imx_aipstz_of_ids[] = {
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{ .compatible = "fsl,imx8mp-aipstz", .data = &imx8mp_aipstz_default_cfg },
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{ }
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};
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MODULE_DEVICE_TABLE(of, imx_aipstz_of_ids);
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static struct platform_driver imx_aipstz_of_driver = {
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.probe = imx_aipstz_probe,
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.remove = imx_aipstz_remove,
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.driver = {
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.name = "imx-aipstz",
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.of_match_table = imx_aipstz_of_ids,
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.pm = pm_ptr(&imx_aipstz_pm_ops),
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},
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};
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module_platform_driver(imx_aipstz_of_driver);
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MODULE_LICENSE("GPL");
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MODULE_DESCRIPTION("IMX secure AHB to IP Slave bus (AIPSTZ) bridge driver");
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MODULE_AUTHOR("Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>");
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