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Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not see http www gnu org licenses extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 503 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Enrico Weigelt <info@metux.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190602204653.811534538@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
158 lines
5.4 KiB
C
158 lines
5.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
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* Copyright (C) 2013 Red Hat
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* Author: Rob Clark <robdclark@gmail.com>
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*/
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#ifndef __DPU_ENCODER_H__
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#define __DPU_ENCODER_H__
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#include <drm/drm_crtc.h>
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#include "dpu_hw_mdss.h"
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#define DPU_ENCODER_FRAME_EVENT_DONE BIT(0)
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#define DPU_ENCODER_FRAME_EVENT_ERROR BIT(1)
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#define DPU_ENCODER_FRAME_EVENT_PANEL_DEAD BIT(2)
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#define DPU_ENCODER_FRAME_EVENT_IDLE BIT(3)
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#define IDLE_TIMEOUT (66 - 16/2)
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/**
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* Encoder functions and data types
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* @intfs: Interfaces this encoder is using, INTF_MODE_NONE if unused
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*/
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struct dpu_encoder_hw_resources {
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enum dpu_intf_mode intfs[INTF_MAX];
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};
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/**
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* dpu_encoder_get_hw_resources - Populate table of required hardware resources
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* @encoder: encoder pointer
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* @hw_res: resource table to populate with encoder required resources
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*/
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void dpu_encoder_get_hw_resources(struct drm_encoder *encoder,
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struct dpu_encoder_hw_resources *hw_res);
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/**
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* dpu_encoder_assign_crtc - Link the encoder to the crtc it's assigned to
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* @encoder: encoder pointer
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* @crtc: crtc pointer
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*/
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void dpu_encoder_assign_crtc(struct drm_encoder *encoder,
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struct drm_crtc *crtc);
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/**
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* dpu_encoder_toggle_vblank_for_crtc - Toggles vblank interrupts on or off if
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* the encoder is assigned to the given crtc
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* @encoder: encoder pointer
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* @crtc: crtc pointer
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* @enable: true if vblank should be enabled
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*/
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void dpu_encoder_toggle_vblank_for_crtc(struct drm_encoder *encoder,
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struct drm_crtc *crtc, bool enable);
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/**
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* dpu_encoder_register_frame_event_callback - provide callback to encoder that
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* will be called after the request is complete, or other events.
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* @encoder: encoder pointer
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* @cb: callback pointer, provide NULL to deregister
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* @data: user data provided to callback
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*/
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void dpu_encoder_register_frame_event_callback(struct drm_encoder *encoder,
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void (*cb)(void *, u32), void *data);
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/**
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* dpu_encoder_prepare_for_kickoff - schedule double buffer flip of the ctl
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* path (i.e. ctl flush and start) at next appropriate time.
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* Immediately: if no previous commit is outstanding.
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* Delayed: Block until next trigger can be issued.
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* @encoder: encoder pointer
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* @async: true if this is an asynchronous commit
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*/
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void dpu_encoder_prepare_for_kickoff(struct drm_encoder *encoder, bool async);
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/**
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* dpu_encoder_trigger_kickoff_pending - Clear the flush bits from previous
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* kickoff and trigger the ctl prepare progress for command mode display.
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* @encoder: encoder pointer
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*/
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void dpu_encoder_trigger_kickoff_pending(struct drm_encoder *encoder);
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/**
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* dpu_encoder_kickoff - trigger a double buffer flip of the ctl path
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* (i.e. ctl flush and start) immediately.
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* @encoder: encoder pointer
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* @async: true if this is an asynchronous commit
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*/
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void dpu_encoder_kickoff(struct drm_encoder *encoder, bool async);
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/**
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* dpu_encoder_wait_for_event - Waits for encoder events
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* @encoder: encoder pointer
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* @event: event to wait for
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* MSM_ENC_COMMIT_DONE - Wait for hardware to have flushed the current pending
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* frames to hardware at a vblank or ctl_start
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* Encoders will map this differently depending on the
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* panel type.
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* vid mode -> vsync_irq
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* cmd mode -> ctl_start
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* MSM_ENC_TX_COMPLETE - Wait for the hardware to transfer all the pixels to
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* the panel. Encoders will map this differently
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* depending on the panel type.
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* vid mode -> vsync_irq
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* cmd mode -> pp_done
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* Returns: 0 on success, -EWOULDBLOCK if already signaled, error otherwise
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*/
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int dpu_encoder_wait_for_event(struct drm_encoder *drm_encoder,
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enum msm_event_wait event);
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/*
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* dpu_encoder_get_intf_mode - get interface mode of the given encoder
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* @encoder: Pointer to drm encoder object
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*/
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enum dpu_intf_mode dpu_encoder_get_intf_mode(struct drm_encoder *encoder);
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/**
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* dpu_encoder_virt_runtime_resume - pm runtime resume the encoder configs
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* @encoder: encoder pointer
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*/
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void dpu_encoder_virt_runtime_resume(struct drm_encoder *encoder);
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/**
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* dpu_encoder_init - initialize virtual encoder object
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* @dev: Pointer to drm device structure
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* @disp_info: Pointer to display information structure
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* Returns: Pointer to newly created drm encoder
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*/
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struct drm_encoder *dpu_encoder_init(
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struct drm_device *dev,
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int drm_enc_mode);
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/**
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* dpu_encoder_setup - setup dpu_encoder for the display probed
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* @dev: Pointer to drm device structure
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* @enc: Pointer to the drm_encoder
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* @disp_info: Pointer to the display info
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*/
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int dpu_encoder_setup(struct drm_device *dev, struct drm_encoder *enc,
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struct msm_display_info *disp_info);
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/**
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* dpu_encoder_prepare_commit - prepare encoder at the very beginning of an
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* atomic commit, before any registers are written
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* @drm_enc: Pointer to previously created drm encoder structure
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*/
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void dpu_encoder_prepare_commit(struct drm_encoder *drm_enc);
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/**
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* dpu_encoder_set_idle_timeout - set the idle timeout for video
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* and command mode encoders.
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* @drm_enc: Pointer to previously created drm encoder structure
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* @idle_timeout: idle timeout duration in milliseconds
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*/
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void dpu_encoder_set_idle_timeout(struct drm_encoder *drm_enc,
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u32 idle_timeout);
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#endif /* __DPU_ENCODER_H__ */
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