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a8fffbe7de
v2: move some defines that resided in etnaviv_flop_reset.c
into the header as well
v3: fix spacing/tab stops
[cgmeiner: remove use of multiple blank lines]
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Tested-by: Marek Vasut <marek.vasut@mailbox.org> # STM32MP255C DHCOS DHSBC
Link: https://patch.msgid.link/20251119164624.9297-2-gert.wollny@collabora.com
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
111 lines
5.0 KiB
C
111 lines
5.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef STATE_3D_XML
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#define STATE_3D_XML
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/* This is a cut-down version of the state_3d.xml.h file */
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#define VIVS_CL_CONFIG 0x00000900
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#define VIVS_CL_CONFIG_DIMENSIONS__MASK 0x00000003
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#define VIVS_CL_CONFIG_DIMENSIONS__SHIFT 0
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#define VIVS_CL_CONFIG_DIMENSIONS(x) (((x) << VIVS_CL_CONFIG_DIMENSIONS__SHIFT) & VIVS_CL_CONFIG_DIMENSIONS__MASK)
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#define VIVS_CL_CONFIG_TRAVERSE_ORDER__MASK 0x00000070
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#define VIVS_CL_CONFIG_TRAVERSE_ORDER__SHIFT 4
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#define VIVS_CL_CONFIG_TRAVERSE_ORDER(x) (((x) << VIVS_CL_CONFIG_TRAVERSE_ORDER__SHIFT) & VIVS_CL_CONFIG_TRAVERSE_ORDER__MASK)
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#define VIVS_CL_CONFIG_ENABLE_SWATH_X 0x00000100
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#define VIVS_CL_CONFIG_ENABLE_SWATH_Y 0x00000200
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#define VIVS_CL_CONFIG_ENABLE_SWATH_Z 0x00000400
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#define VIVS_CL_CONFIG_SWATH_SIZE_X__MASK 0x0000f000
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#define VIVS_CL_CONFIG_SWATH_SIZE_X__SHIFT 12
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#define VIVS_CL_CONFIG_SWATH_SIZE_X(x) (((x) << VIVS_CL_CONFIG_SWATH_SIZE_X__SHIFT) & VIVS_CL_CONFIG_SWATH_SIZE_X__MASK)
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#define VIVS_CL_CONFIG_SWATH_SIZE_Y__MASK 0x000f0000
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#define VIVS_CL_CONFIG_SWATH_SIZE_Y__SHIFT 16
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#define VIVS_CL_CONFIG_SWATH_SIZE_Y(x) (((x) << VIVS_CL_CONFIG_SWATH_SIZE_Y__SHIFT) & VIVS_CL_CONFIG_SWATH_SIZE_Y__MASK)
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#define VIVS_CL_CONFIG_SWATH_SIZE_Z__MASK 0x00f00000
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#define VIVS_CL_CONFIG_SWATH_SIZE_Z__SHIFT 20
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#define VIVS_CL_CONFIG_SWATH_SIZE_Z(x) (((x) << VIVS_CL_CONFIG_SWATH_SIZE_Z__SHIFT) & VIVS_CL_CONFIG_SWATH_SIZE_Z__MASK)
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#define VIVS_CL_CONFIG_DIMENSIONS__MASK 0x00000003
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#define VIVS_CL_CONFIG_DIMENSIONS__SHIFT 0
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#define VIVS_CL_CONFIG_DIMENSIONS(x) (((x) << VIVS_CL_CONFIG_DIMENSIONS__SHIFT) & VIVS_CL_CONFIG_DIMENSIONS__MASK)
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#define VIVS_CL_CONFIG_VALUE_ORDER__MASK 0x07000000
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#define VIVS_CL_CONFIG_VALUE_ORDER__SHIFT 24
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#define VIVS_CL_CONFIG_VALUE_ORDER(x) (((x) << VIVS_CL_CONFIG_VALUE_ORDER__SHIFT) & VIVS_CL_CONFIG_VALUE_ORDER__MASK)
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#define VIVS_CL_GLOBAL_WORK_OFFSET_X 0x0000092c
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#define VIVS_CL_GLOBAL_WORK_OFFSET_Y 0x00000934
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#define VIVS_CL_GLOBAL_WORK_OFFSET_Z 0x0000093c
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#define VIVS_CL_KICKER 0x00000920
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#define VIVS_CL_THREAD_ALLOCATION 0x0000091c
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#define VIVS_CL_UNK00924 0x00000924
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#define VIVS_CL_WORKGROUP_COUNT_X 0x00000940
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#define VIVS_CL_WORKGROUP_COUNT_Y 0x00000944
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#define VIVS_CL_WORKGROUP_COUNT_Z 0x00000948
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#define VIVS_CL_WORKGROUP_SIZE_X 0x0000094c
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#define VIVS_CL_WORKGROUP_SIZE_Y 0x00000950
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#define VIVS_CL_WORKGROUP_SIZE_Z 0x00000954
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#define VIVS_CL_GLOBAL_SCALE_X 0x00000958
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#define VIVS_CL_GLOBAL_SCALE_Y 0x0000095c
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#define VIVS_CL_GLOBAL_SCALE_Z 0x00000960
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#define VIVS_PA_VS_OUTPUT_COUNT 0x00000aa8
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#define VIVS_PS_CONTROL_EXT 0x00001030
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#define VIVS_PS_ICACHE_COUNT 0x00001094
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#define VIVS_PS_ICACHE_PREFETCH 0x00001048
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#define VIVS_PS_INPUT_COUNT 0x00001008
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#define VIVS_PS_INPUT_COUNT_COUNT__MASK 0x0000001f
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#define VIVS_PS_INPUT_COUNT_COUNT__SHIFT 0
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#define VIVS_PS_INPUT_COUNT_COUNT(x) (((x) << VIVS_PS_INPUT_COUNT_COUNT__SHIFT) & VIVS_PS_INPUT_COUNT_COUNT__MASK)
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#define VIVS_PS_NEWRANGE_LOW 0x0000087c
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#define VIVS_PS_NEWRANGE_HIGH 0x00001090
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#define VIVS_PS_SAMPLER_BASE 0x00001058
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#define VIVS_PS_UNIFORM_BASE 0x00001024
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#define VIVS_PS_INST_ADDR 0x00001028
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#define VIVS_PS_TEMP_REGISTER_CONTROL 0x0000100c
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#define VIVS_PS_TEMP_REGISTER_CONTROL_NUM_TEMPS__MASK 0x0000003f
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#define VIVS_PS_TEMP_REGISTER_CONTROL_NUM_TEMPS__SHIFT 0
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#define VIVS_PS_TEMP_REGISTER_CONTROL_NUM_TEMPS(x) (((x) << VIVS_PS_TEMP_REGISTER_CONTROL_NUM_TEMPS__SHIFT) & VIVS_PS_TEMP_REGISTER_CONTROL_NUM_TEMPS__MASK)
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#define VIVS_PS_VARYING_NUM_COMPONENTS(i0) (0x00001080 + 0x4*(i0))
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#define VIVS_PS_VARYING_NUM_COMPONENTS__ESIZE 0x00000004
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#define VIVS_PS_VARYING_NUM_COMPONENTS__LEN 0x00000004
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#define VIVS_SH_CONFIG 0x00015600
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#define VIVS_SH_CONFIG_RTNE_ROUNDING 0x00000002
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#define VIVS_SH_HALTI5_UNIFORMS(i0) (0x00036000 + 0x4*(i0))
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#define VIVS_SH_HALTI5_UNIFORMS__ESIZE 0x00000004
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#define VIVS_SH_HALTI5_UNIFORMS__LEN 0x00000800
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#define VIVS_VS_HALTI5_UNK008A0 0x000008a0
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#define VIVS_VS_HALTI5_UNK008A0_A__MASK 0x0000003f
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#define VIVS_VS_HALTI5_UNK008A0_A__SHIFT 0
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#define VIVS_VS_HALTI5_UNK008A0_A(x) (((x) << VIVS_VS_HALTI5_UNK008A0_A__SHIFT) & VIVS_VS_HALTI5_UNK008A0_A__MASK)
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#define VIVS_VS_ICACHE_CONTROL 0x00000868
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#define VIVS_VS_ICACHE_CONTROL_ENABLE 0x00000001
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#define VIVS_VS_ICACHE_INVALIDATE 0x000008b0
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#define VIVS_VS_OUTPUT_COUNT 0x00000804
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#define VIVS_VS_OUTPUT_COUNT_COUNT__MASK 0x000000ff
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#define VIVS_VS_OUTPUT_COUNT_COUNT__SHIFT 0
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#define VIVS_VS_OUTPUT_COUNT_COUNT(x) (((x) << VIVS_VS_OUTPUT_COUNT_COUNT__SHIFT) & VIVS_VS_OUTPUT_COUNT_COUNT__MASK)
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#define VIVS_TS_FLUSH_CACHE 0x00001650
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#define VIVS_TS_FLUSH_CACHE_FLUSH 0x00000001
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#define VIVS_NTE_DESCRIPTOR_FLUSH 0x00014c44
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#define VIVS_NTE_DESCRIPTOR_FLUSH_UNK28__MASK 0xf0000000
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#define VIVS_NTE_DESCRIPTOR_FLUSH_UNK28__SHIFT 28
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#define VIVS_NTE_DESCRIPTOR_FLUSH_UNK28(x) (((x) << VIVS_NTE_DESCRIPTOR_FLUSH_UNK28__SHIFT) & VIVS_NTE_DESCRIPTOR_FLUSH_UNK28__MASK)
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#endif /* STATE_3D_XML */
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