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ACR is responsible for managing the firmware for LS (Low Secure) falcons, this was previously handled in the driver by SECBOOT. This rewrite started from some test code that attempted to replicate the procedure RM uses in order to debug early Turing ACR firmwares that were provided by NVIDIA for development. Compared with SECBOOT, the code is structured into more individual steps, with the aim of making the process easier to follow/debug, whilst making it possible to support newer firmware versions that may have a different binary format or API interface. The HS (High Secure) binary(s) are now booted earlier in device init, to match the behaviour of RM, whereas SECBOOT would delay this until we try to boot the first LS falcon. There's also additional debugging features available, with the intention of making it easier to solve issues during FW/HW bring-up in the future. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
30 lines
850 B
C
30 lines
850 B
C
/* SPDX-License-Identifier: MIT */
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#ifndef __NVKM_SEC2_PRIV_H__
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#define __NVKM_SEC2_PRIV_H__
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#include <engine/sec2.h>
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struct nvkm_sec2_func {
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const struct nvkm_falcon_func *flcn;
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u8 unit_acr;
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void (*intr)(struct nvkm_sec2 *);
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int (*initmsg)(struct nvkm_sec2 *);
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};
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void gp102_sec2_intr(struct nvkm_sec2 *);
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int gp102_sec2_initmsg(struct nvkm_sec2 *);
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struct nvkm_sec2_fwif {
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int version;
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int (*load)(struct nvkm_sec2 *, int ver, const struct nvkm_sec2_fwif *);
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const struct nvkm_sec2_func *func;
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const struct nvkm_acr_lsf_func *acr;
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};
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int gp102_sec2_load(struct nvkm_sec2 *, int, const struct nvkm_sec2_fwif *);
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extern const struct nvkm_sec2_func gp102_sec2;
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extern const struct nvkm_acr_lsf_func gp102_sec2_acr_1;
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int nvkm_sec2_new_(const struct nvkm_sec2_fwif *, struct nvkm_device *,
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int, u32 addr, struct nvkm_sec2 **);
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#endif
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