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efe897b557
Add compatible strings for clock drivers to support Spacemit K3 SoC, also includes all the defined clock IDs. The SpacemiT K3 SoC clock IP is scattered over several different blocks, which are APBC, APBS, APMU, DCIU, MPMU, all of them are capable of generating clock and reset signals. APMU and MPMU have additional Power Domain management functionality. Following is a brief list that shows devices managed in each block: APBC: UART, GPIO, PWM, SPI, TIMER, I2S, IR, DR, TSEN, IPC, CAN APBS: various PPL clocks control APMU: CCI, CPU, CSI, ISP, LCD, USB, QSPI, DMA, VPU, GPU, DSI, PCIe, EMAC.. DCID: SRAM, DMA, TCM MPMU: various PLL1 derived clocks, UART, WATCHDOG, I2S Link: https://lore.kernel.org/r/20260108-k3-clk-v5-1-42a11b74ad58@gentoo.org Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Yixun Lan <dlan@gentoo.org>
54 lines
1.1 KiB
YAML
54 lines
1.1 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/spacemit,k1-pll.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: SpacemiT K1/K3 PLL
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maintainers:
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- Haylen Chu <heylenay@4d2.org>
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properties:
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compatible:
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enum:
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- spacemit,k1-pll
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- spacemit,k3-pll
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reg:
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maxItems: 1
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clocks:
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description: External 24MHz oscillator
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spacemit,mpmu:
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$ref: /schemas/types.yaml#/definitions/phandle
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description:
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Phandle to the "Main PMU (MPMU)" syscon. It is used to check PLL
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lock status.
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"#clock-cells":
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const: 1
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description:
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For K1 SoC, check <dt-bindings/clock/spacemit,k1-syscon.h> for valid indices.
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For K3 SoC, check <dt-bindings/clock/spacemit,k3-clocks.h> for valid indices.
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required:
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- compatible
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- reg
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- clocks
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- spacemit,mpmu
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- "#clock-cells"
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additionalProperties: false
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examples:
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- |
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clock-controller@d4090000 {
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compatible = "spacemit,k1-pll";
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reg = <0xd4090000 0x1000>;
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clocks = <&vctcxo_24m>;
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spacemit,mpmu = <&sysctl_mpmu>;
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#clock-cells = <1>;
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};
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