Files
linux/lib/raid/xor/arm/xor.c
Christoph Hellwig 80dcf0a783 xor: pass the entire operation to the low-level ops
Currently the high-level xor code chunks up all operations into small
units for only up to 1 + 4 vectors, and passes it to four different
methods.  This means the FPU/vector context is entered and left a lot for
wide stripes, and a lot of indirect expensive indirect calls are
performed.  Switch to passing the entire gen_xor request to the low-level
ops, and provide a macro to dispatch it to the existing helper.

This reduce the number of indirect calls and FPU/vector context switches
by a factor approaching nr_stripes / 4, and also reduces source and binary
code size.

Link: https://lkml.kernel.org/r/20260327061704.3707577-27-hch@lst.de
Signed-off-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Eric Biggers <ebiggers@kernel.org>
Tested-by: Eric Biggers <ebiggers@kernel.org>
Cc: Albert Ou <aou@eecs.berkeley.edu>
Cc: Alexander Gordeev <agordeev@linux.ibm.com>
Cc: Alexandre Ghiti <alex@ghiti.fr>
Cc: Andreas Larsson <andreas@gaisler.com>
Cc: Anton Ivanov <anton.ivanov@cambridgegreys.com>
Cc: Ard Biesheuvel <ardb@kernel.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: "Borislav Petkov (AMD)" <bp@alien8.de>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Chris Mason <clm@fb.com>
Cc: Christian Borntraeger <borntraeger@linux.ibm.com>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: David S. Miller <davem@davemloft.net>
Cc: David Sterba <dsterba@suse.com>
Cc: Heiko Carstens <hca@linux.ibm.com>
Cc: Herbert Xu <herbert@gondor.apana.org.au>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Huacai Chen <chenhuacai@kernel.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Jason A. Donenfeld <jason@zx2c4.com>
Cc: Johannes Berg <johannes@sipsolutions.net>
Cc: Li Nan <linan122@huawei.com>
Cc: Madhavan Srinivasan <maddy@linux.ibm.com>
Cc: Magnus Lindholm <linmag7@gmail.com>
Cc: Matt Turner <mattst88@gmail.com>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Nicholas Piggin <npiggin@gmail.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Richard Henderson <richard.henderson@linaro.org>
Cc: Richard Weinberger <richard@nod.at>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Song Liu <song@kernel.org>
Cc: Sven Schnelle <svens@linux.ibm.com>
Cc: Ted Ts'o <tytso@mit.edu>
Cc: Vasily Gorbik <gor@linux.ibm.com>
Cc: WANG Xuerui <kernel@xen0n.name>
Cc: Will Deacon <will@kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2026-04-02 23:36:21 -07:00

137 lines
3.6 KiB
C

// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2001 Russell King
*/
#include "xor_impl.h"
#include "xor_arch.h"
#define __XOR(a1, a2) a1 ^= a2
#define GET_BLOCK_2(dst) \
__asm__("ldmia %0, {%1, %2}" \
: "=r" (dst), "=r" (a1), "=r" (a2) \
: "0" (dst))
#define GET_BLOCK_4(dst) \
__asm__("ldmia %0, {%1, %2, %3, %4}" \
: "=r" (dst), "=r" (a1), "=r" (a2), "=r" (a3), "=r" (a4) \
: "0" (dst))
#define XOR_BLOCK_2(src) \
__asm__("ldmia %0!, {%1, %2}" \
: "=r" (src), "=r" (b1), "=r" (b2) \
: "0" (src)); \
__XOR(a1, b1); __XOR(a2, b2);
#define XOR_BLOCK_4(src) \
__asm__("ldmia %0!, {%1, %2, %3, %4}" \
: "=r" (src), "=r" (b1), "=r" (b2), "=r" (b3), "=r" (b4) \
: "0" (src)); \
__XOR(a1, b1); __XOR(a2, b2); __XOR(a3, b3); __XOR(a4, b4)
#define PUT_BLOCK_2(dst) \
__asm__ __volatile__("stmia %0!, {%2, %3}" \
: "=r" (dst) \
: "0" (dst), "r" (a1), "r" (a2))
#define PUT_BLOCK_4(dst) \
__asm__ __volatile__("stmia %0!, {%2, %3, %4, %5}" \
: "=r" (dst) \
: "0" (dst), "r" (a1), "r" (a2), "r" (a3), "r" (a4))
static void
xor_arm4regs_2(unsigned long bytes, unsigned long * __restrict p1,
const unsigned long * __restrict p2)
{
unsigned int lines = bytes / sizeof(unsigned long) / 4;
register unsigned int a1 __asm__("r4");
register unsigned int a2 __asm__("r5");
register unsigned int a3 __asm__("r6");
register unsigned int a4 __asm__("r10");
register unsigned int b1 __asm__("r8");
register unsigned int b2 __asm__("r9");
register unsigned int b3 __asm__("ip");
register unsigned int b4 __asm__("lr");
do {
GET_BLOCK_4(p1);
XOR_BLOCK_4(p2);
PUT_BLOCK_4(p1);
} while (--lines);
}
static void
xor_arm4regs_3(unsigned long bytes, unsigned long * __restrict p1,
const unsigned long * __restrict p2,
const unsigned long * __restrict p3)
{
unsigned int lines = bytes / sizeof(unsigned long) / 4;
register unsigned int a1 __asm__("r4");
register unsigned int a2 __asm__("r5");
register unsigned int a3 __asm__("r6");
register unsigned int a4 __asm__("r10");
register unsigned int b1 __asm__("r8");
register unsigned int b2 __asm__("r9");
register unsigned int b3 __asm__("ip");
register unsigned int b4 __asm__("lr");
do {
GET_BLOCK_4(p1);
XOR_BLOCK_4(p2);
XOR_BLOCK_4(p3);
PUT_BLOCK_4(p1);
} while (--lines);
}
static void
xor_arm4regs_4(unsigned long bytes, unsigned long * __restrict p1,
const unsigned long * __restrict p2,
const unsigned long * __restrict p3,
const unsigned long * __restrict p4)
{
unsigned int lines = bytes / sizeof(unsigned long) / 2;
register unsigned int a1 __asm__("r8");
register unsigned int a2 __asm__("r9");
register unsigned int b1 __asm__("ip");
register unsigned int b2 __asm__("lr");
do {
GET_BLOCK_2(p1);
XOR_BLOCK_2(p2);
XOR_BLOCK_2(p3);
XOR_BLOCK_2(p4);
PUT_BLOCK_2(p1);
} while (--lines);
}
static void
xor_arm4regs_5(unsigned long bytes, unsigned long * __restrict p1,
const unsigned long * __restrict p2,
const unsigned long * __restrict p3,
const unsigned long * __restrict p4,
const unsigned long * __restrict p5)
{
unsigned int lines = bytes / sizeof(unsigned long) / 2;
register unsigned int a1 __asm__("r8");
register unsigned int a2 __asm__("r9");
register unsigned int b1 __asm__("ip");
register unsigned int b2 __asm__("lr");
do {
GET_BLOCK_2(p1);
XOR_BLOCK_2(p2);
XOR_BLOCK_2(p3);
XOR_BLOCK_2(p4);
XOR_BLOCK_2(p5);
PUT_BLOCK_2(p1);
} while (--lines);
}
DO_XOR_BLOCKS(arm4regs, xor_arm4regs_2, xor_arm4regs_3, xor_arm4regs_4,
xor_arm4regs_5);
struct xor_block_template xor_block_arm4regs = {
.name = "arm4regs",
.xor_gen = xor_gen_arm4regs,
};