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c1a9a21f93
The "arm" binding directory is for architecture specific and top-level board bindings. Move all the MediaTek bindings implementing clock providers from "arm/mediatek/" to "clock/" binding directories. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20240807-dt-mediatek-clk-v1-2-e8d568abfd48@kernel.org Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
72 lines
1.7 KiB
YAML
72 lines
1.7 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/mediatek,pericfg.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: MediaTek Peripheral Configuration Controller
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maintainers:
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- Bartosz Golaszewski <bgolaszewski@baylibre.com>
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description:
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The Mediatek pericfg controller provides various clocks and reset outputs
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to the system.
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properties:
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compatible:
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oneOf:
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- items:
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- enum:
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- mediatek,mt2701-pericfg
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- mediatek,mt2712-pericfg
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- mediatek,mt6765-pericfg
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- mediatek,mt6795-pericfg
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- mediatek,mt7622-pericfg
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- mediatek,mt7629-pericfg
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- mediatek,mt8135-pericfg
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- mediatek,mt8173-pericfg
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- mediatek,mt8183-pericfg
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- mediatek,mt8186-pericfg
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- mediatek,mt8188-pericfg
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- mediatek,mt8195-pericfg
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- mediatek,mt8516-pericfg
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- const: syscon
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- items:
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# Special case for mt7623 for backward compatibility
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- const: mediatek,mt7623-pericfg
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- const: mediatek,mt2701-pericfg
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- const: syscon
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reg:
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maxItems: 1
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'#clock-cells':
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const: 1
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'#reset-cells':
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const: 1
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required:
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- compatible
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- reg
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additionalProperties: false
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examples:
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- |
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pericfg@10003000 {
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compatible = "mediatek,mt8173-pericfg", "syscon";
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reg = <0x10003000 0x1000>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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- |
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pericfg@10003000 {
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compatible = "mediatek,mt7623-pericfg", "mediatek,mt2701-pericfg", "syscon";
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reg = <0x10003000 0x1000>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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