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a500427c84
Add interconnect-cells to clock provider so that it can be used as icc provider. Add master/slave ids for Qualcomm IPQ5332 Network-On-Chip interfaces. This will be used by the gcc-ipq5332 driver for providing interconnect services using the icc-clk framework. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> Link: https://lore.kernel.org/r/20240730054817.1915652-2-quic_varada@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
57 lines
1.3 KiB
YAML
57 lines
1.3 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/qcom,ipq5332-gcc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Global Clock & Reset Controller on IPQ5332
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maintainers:
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- Bjorn Andersson <andersson@kernel.org>
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description: |
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Qualcomm global clock control module provides the clocks, resets and power
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domains on IPQ5332.
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See also:: include/dt-bindings/clock/qcom,gcc-ipq5332.h
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allOf:
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- $ref: qcom,gcc.yaml#
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properties:
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compatible:
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const: qcom,ipq5332-gcc
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clocks:
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items:
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- description: Board XO clock source
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- description: Sleep clock source
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- description: PCIE 2lane PHY pipe clock source
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- description: PCIE 2lane x1 PHY pipe clock source (For second lane)
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- description: USB PCIE wrapper pipe clock source
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'#power-domain-cells': false
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'#interconnect-cells':
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const: 1
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required:
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- compatible
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- clocks
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unevaluatedProperties: false
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examples:
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- |
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clock-controller@1800000 {
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compatible = "qcom,ipq5332-gcc";
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reg = <0x01800000 0x80000>;
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clocks = <&xo_board>,
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<&sleep_clk>,
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<&pcie_2lane_phy_pipe_clk>,
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<&pcie_2lane_phy_pipe_clk_x1>,
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<&usb_pcie_wrapper_pipe_clk>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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...
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