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This adds the bindings documentation for the Analog Devices AXI DAC IP core. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Nuno Sa <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20240419-iio-backend-axi-dac-v4-6-5ca45b4de294@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
63 lines
1.3 KiB
YAML
63 lines
1.3 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/iio/dac/adi,axi-dac.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Analog Devices AXI DAC IP core
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maintainers:
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- Nuno Sa <nuno.sa@analog.com>
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description: |
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Analog Devices Generic AXI DAC IP core for interfacing a DAC device
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with a high speed serial (JESD204B/C) or source synchronous parallel
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interface (LVDS/CMOS).
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Usually, some other interface type (i.e SPI) is used as a control
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interface for the actual DAC, while this IP core will interface
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to the data-lines of the DAC and handle the streaming of data from
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memory via DMA into the DAC.
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https://wiki.analog.com/resources/fpga/docs/axi_dac_ip
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properties:
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compatible:
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enum:
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- adi,axi-dac-9.1.b
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reg:
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maxItems: 1
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dmas:
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maxItems: 1
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dma-names:
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items:
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- const: tx
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clocks:
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maxItems: 1
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'#io-backend-cells':
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const: 0
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required:
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- compatible
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- dmas
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- reg
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- clocks
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additionalProperties: false
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examples:
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- |
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dac@44a00000 {
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compatible = "adi,axi-dac-9.1.b";
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reg = <0x44a00000 0x10000>;
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dmas = <&tx_dma 0>;
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dma-names = "tx";
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#io-backend-cells = <0>;
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clocks = <&axi_clk>;
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};
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...
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