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This encoder-only device is present four times on this SoC, and should support everything the rk3568 vepu supports (so JPEG, H.264 and VP8 encoding). No fallback compatible has been added, since the operating systems might already support RK3568 VEPU and want to avoid registering four of them separately considering they can be used as a cluster. Signed-off-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Signed-off-by: Sebastian Fricke <sebastian.fricke@collabora.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
71 lines
1.4 KiB
YAML
71 lines
1.4 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/media/rockchip,rk3568-vepu.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Hantro G1 VPU encoders implemented on Rockchip SoCs
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maintainers:
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- Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
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description:
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Hantro G1 video encode-only accelerators present on Rockchip SoCs.
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properties:
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compatible:
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enum:
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- rockchip,rk3568-vepu
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- rockchip,rk3588-vepu121
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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maxItems: 2
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clock-names:
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items:
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- const: aclk
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- const: hclk
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power-domains:
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maxItems: 1
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iommus:
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maxItems: 1
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/rk3568-cru.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/power/rk3568-power.h>
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bus {
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#address-cells = <2>;
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#size-cells = <2>;
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vepu: video-codec@fdee0000 {
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compatible = "rockchip,rk3568-vepu";
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reg = <0x0 0xfdee0000 0x0 0x800>;
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interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru ACLK_JENC>, <&cru HCLK_JENC>;
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clock-names = "aclk", "hclk";
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iommus = <&vepu_mmu>;
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power-domains = <&power RK3568_PD_RGA>;
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};
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};
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