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There are two MQS instances on the i.MX95 platform. The definition of bit positions in the control register are different. In order to support these MQS modules, define two compatible strings to distinguish them. As one instance is in the always-on domain, another is in the net controller domain, so the compatible strings are "fsl,imx95-aonmix-mqs", "fsl,imx95-netcmix-mqs". Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://msgid.link/r/1716347305-18457-2-git-send-email-shengjiu.wang@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
108 lines
2.2 KiB
YAML
108 lines
2.2 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/sound/fsl,mqs.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NXP Medium Quality Sound (MQS)
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maintainers:
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- Shengjiu Wang <shengjiu.wang@nxp.com>
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- Chancel Liu <chancel.liu@nxp.com>
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description: |
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Medium quality sound (MQS) is used to generate medium quality audio
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via a standard GPIO in the pinmux, allowing the user to connect
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stereo speakers or headphones to a power amplifier without an
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additional DAC chip.
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properties:
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compatible:
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enum:
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- fsl,imx6sx-mqs
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- fsl,imx8qm-mqs
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- fsl,imx8qxp-mqs
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- fsl,imx93-mqs
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- fsl,imx95-aonmix-mqs
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- fsl,imx95-netcmix-mqs
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clocks:
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minItems: 1
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maxItems: 2
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clock-names:
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minItems: 1
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maxItems: 2
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gpr:
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$ref: /schemas/types.yaml#/definitions/phandle
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description: The phandle to the General Purpose Register (GPR) node
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reg:
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maxItems: 1
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power-domains:
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maxItems: 1
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resets:
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maxItems: 1
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required:
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- compatible
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- clocks
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- clock-names
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allOf:
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- if:
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properties:
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compatible:
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contains:
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enum:
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- fsl,imx8qm-mqs
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- fsl,imx8qxp-mqs
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then:
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properties:
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clocks:
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items:
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- description: Master clock
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- description: Clock for register access
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clock-names:
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items:
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- const: mclk
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- const: core
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required:
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- reg
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- power-domains
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else:
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properties:
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clocks:
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items:
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- description: Master clock
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clock-names:
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items:
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- const: mclk
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required:
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- gpr
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/imx6sx-clock.h>
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mqs0: mqs {
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compatible = "fsl,imx6sx-mqs";
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gpr = <&gpr>;
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clocks = <&clks IMX6SX_CLK_SAI1>;
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clock-names = "mclk";
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};
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- |
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#include <dt-bindings/firmware/imx/rsrc.h>
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mqs1: mqs@59850000 {
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compatible = "fsl,imx8qm-mqs";
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reg = <0x59850000 0x10000>;
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clocks = <&mqs0_lpcg 0>, <&mqs0_lpcg 1>;
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clock-names = "mclk", "core";
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power-domains = <&pd IMX_SC_R_MQS_0>;
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};
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