Beniamin Sandu 1536dc8edc arm64: dts: socfpga: stratix10: add L2 cache info ...

This removes cacheinfo warnings at boot, e.g.:
cacheinfo: Unable to detect cache hierarchy for CPU 0

Signed-off-by: Beniamin Sandu <beniaminsandu@gmail.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>

2024-05-31 17:04:12 -05:00

..

Makefile

arm64: dts: Add support for Stratix 10 Software Virtual Platform

2022-06-15 09:51:44 -05:00

socfpga_stratix10_socdk_nand.dts

arm64: dts: stratix10: socdk_nand: drop unneeded flash address/size-cells

2024-05-30 11:20:13 -05:00

socfpga_stratix10_socdk.dts

arm64: dts: stratix10: socdk: drop unneeded flash address/size-cells

2024-05-30 11:20:13 -05:00

socfpga_stratix10_swvp.dts

arm64: dts: socfpga: stratix10_swvp: drop unsupported DW MSHC properties

2024-01-03 18:10:40 -06:00

socfpga_stratix10.dtsi

arm64: dts: socfpga: stratix10: add L2 cache info

2024-05-31 17:04:12 -05:00