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1f5288874d
In preparation for misaligned vector performance hwprobe keys, rename the hwprobe key values associated with misaligned scalar accesses to include the term SCALAR. Leave the old defines in place to maintain source compatibility. This change is intended to be a functional no-op. Signed-off-by: Evan Green <evan@rivosinc.com> Reviewed-by: Charlie Jenkins <charlie@rivosinc.com> Link: https://lore.kernel.org/r/20240809214444.3257596-3-evan@rivosinc.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
97 lines
3.6 KiB
C
97 lines
3.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
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/*
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* Copyright 2023 Rivos, Inc
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*/
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#ifndef _UAPI_ASM_HWPROBE_H
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#define _UAPI_ASM_HWPROBE_H
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#include <linux/types.h>
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/*
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* Interface for probing hardware capabilities from userspace, see
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* Documentation/arch/riscv/hwprobe.rst for more information.
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*/
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struct riscv_hwprobe {
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__s64 key;
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__u64 value;
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};
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#define RISCV_HWPROBE_KEY_MVENDORID 0
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#define RISCV_HWPROBE_KEY_MARCHID 1
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#define RISCV_HWPROBE_KEY_MIMPID 2
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#define RISCV_HWPROBE_KEY_BASE_BEHAVIOR 3
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#define RISCV_HWPROBE_BASE_BEHAVIOR_IMA (1 << 0)
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#define RISCV_HWPROBE_KEY_IMA_EXT_0 4
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#define RISCV_HWPROBE_IMA_FD (1 << 0)
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#define RISCV_HWPROBE_IMA_C (1 << 1)
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#define RISCV_HWPROBE_IMA_V (1 << 2)
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#define RISCV_HWPROBE_EXT_ZBA (1 << 3)
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#define RISCV_HWPROBE_EXT_ZBB (1 << 4)
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#define RISCV_HWPROBE_EXT_ZBS (1 << 5)
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#define RISCV_HWPROBE_EXT_ZICBOZ (1 << 6)
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#define RISCV_HWPROBE_EXT_ZBC (1 << 7)
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#define RISCV_HWPROBE_EXT_ZBKB (1 << 8)
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#define RISCV_HWPROBE_EXT_ZBKC (1 << 9)
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#define RISCV_HWPROBE_EXT_ZBKX (1 << 10)
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#define RISCV_HWPROBE_EXT_ZKND (1 << 11)
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#define RISCV_HWPROBE_EXT_ZKNE (1 << 12)
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#define RISCV_HWPROBE_EXT_ZKNH (1 << 13)
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#define RISCV_HWPROBE_EXT_ZKSED (1 << 14)
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#define RISCV_HWPROBE_EXT_ZKSH (1 << 15)
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#define RISCV_HWPROBE_EXT_ZKT (1 << 16)
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#define RISCV_HWPROBE_EXT_ZVBB (1 << 17)
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#define RISCV_HWPROBE_EXT_ZVBC (1 << 18)
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#define RISCV_HWPROBE_EXT_ZVKB (1 << 19)
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#define RISCV_HWPROBE_EXT_ZVKG (1 << 20)
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#define RISCV_HWPROBE_EXT_ZVKNED (1 << 21)
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#define RISCV_HWPROBE_EXT_ZVKNHA (1 << 22)
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#define RISCV_HWPROBE_EXT_ZVKNHB (1 << 23)
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#define RISCV_HWPROBE_EXT_ZVKSED (1 << 24)
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#define RISCV_HWPROBE_EXT_ZVKSH (1 << 25)
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#define RISCV_HWPROBE_EXT_ZVKT (1 << 26)
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#define RISCV_HWPROBE_EXT_ZFH (1 << 27)
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#define RISCV_HWPROBE_EXT_ZFHMIN (1 << 28)
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#define RISCV_HWPROBE_EXT_ZIHINTNTL (1 << 29)
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#define RISCV_HWPROBE_EXT_ZVFH (1 << 30)
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#define RISCV_HWPROBE_EXT_ZVFHMIN (1ULL << 31)
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#define RISCV_HWPROBE_EXT_ZFA (1ULL << 32)
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#define RISCV_HWPROBE_EXT_ZTSO (1ULL << 33)
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#define RISCV_HWPROBE_EXT_ZACAS (1ULL << 34)
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#define RISCV_HWPROBE_EXT_ZICOND (1ULL << 35)
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#define RISCV_HWPROBE_EXT_ZIHINTPAUSE (1ULL << 36)
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#define RISCV_HWPROBE_EXT_ZVE32X (1ULL << 37)
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#define RISCV_HWPROBE_EXT_ZVE32F (1ULL << 38)
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#define RISCV_HWPROBE_EXT_ZVE64X (1ULL << 39)
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#define RISCV_HWPROBE_EXT_ZVE64F (1ULL << 40)
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#define RISCV_HWPROBE_EXT_ZVE64D (1ULL << 41)
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#define RISCV_HWPROBE_EXT_ZIMOP (1ULL << 42)
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#define RISCV_HWPROBE_EXT_ZCA (1ULL << 43)
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#define RISCV_HWPROBE_EXT_ZCB (1ULL << 44)
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#define RISCV_HWPROBE_EXT_ZCD (1ULL << 45)
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#define RISCV_HWPROBE_EXT_ZCF (1ULL << 46)
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#define RISCV_HWPROBE_EXT_ZCMOP (1ULL << 47)
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#define RISCV_HWPROBE_EXT_ZAWRS (1ULL << 48)
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#define RISCV_HWPROBE_KEY_CPUPERF_0 5
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#define RISCV_HWPROBE_MISALIGNED_UNKNOWN (0 << 0)
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#define RISCV_HWPROBE_MISALIGNED_EMULATED (1 << 0)
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#define RISCV_HWPROBE_MISALIGNED_SLOW (2 << 0)
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#define RISCV_HWPROBE_MISALIGNED_FAST (3 << 0)
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#define RISCV_HWPROBE_MISALIGNED_UNSUPPORTED (4 << 0)
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#define RISCV_HWPROBE_MISALIGNED_MASK (7 << 0)
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#define RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE 6
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#define RISCV_HWPROBE_KEY_HIGHEST_VIRT_ADDRESS 7
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#define RISCV_HWPROBE_KEY_TIME_CSR_FREQ 8
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#define RISCV_HWPROBE_KEY_MISALIGNED_SCALAR_PERF 9
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#define RISCV_HWPROBE_MISALIGNED_SCALAR_UNKNOWN 0
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#define RISCV_HWPROBE_MISALIGNED_SCALAR_EMULATED 1
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#define RISCV_HWPROBE_MISALIGNED_SCALAR_SLOW 2
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#define RISCV_HWPROBE_MISALIGNED_SCALAR_FAST 3
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#define RISCV_HWPROBE_MISALIGNED_SCALAR_UNSUPPORTED 4
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/* Increase RISCV_HWPROBE_MAX_KEY when adding items. */
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/* Flags */
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#define RISCV_HWPROBE_WHICH_CPUS (1 << 0)
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#endif
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